diff mbox

iio: adc: rockchip_saradc: Explicitly disable ADC on probe

Message ID 1469475540-26855-1-git-send-email-linux@roeck-us.net (mailing list archive)
State New, archived
Headers show

Commit Message

Guenter Roeck July 25, 2016, 7:39 p.m. UTC
If the ADC is read for the first time, the caller gets a timeout error,
and the kernel log shows

read channel() error: -110

The ADC may be enabled on boot, and needs to be explicitly disabled
for a read sequence to work (otherwise there is no completion interrupt).
Disaple it explicitly in the probe function.

Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 drivers/iio/adc/rockchip_saradc.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Heiko Stuebner July 25, 2016, 7:41 p.m. UTC | #1
Am Montag, 25. Juli 2016, 12:39:00 schrieb Guenter Roeck:
> If the ADC is read for the first time, the caller gets a timeout error,
> and the kernel log shows
> 
> read channel() error: -110
> 
> The ADC may be enabled on boot, and needs to be explicitly disabled
> for a read sequence to work (otherwise there is no completion interrupt).
> Disaple it explicitly in the probe function.
> 
> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>

in my tests I hadn't notices that issue before, but that is likely because the 
bootloaders I had didn't enable the saradc. Anyway, that looks definitly sane, 
so

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Caesar Wang July 26, 2016, 2:51 a.m. UTC | #2
Hi Guenter,

Thanks for fixing it.

On 2016年07月26日 03:39, Guenter Roeck wrote:
> If the ADC is read for the first time, the caller gets a timeout error,
> and the kernel log shows
>
> read channel() error: -110
>
> The ADC may be enabled on boot, and needs to be explicitly disabled
> for a read sequence to work (otherwise there is no completion interrupt).
> Disaple it explicitly in the probe function.
>
> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> ---
>   drivers/iio/adc/rockchip_saradc.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
> index f9ad6c2d6821..6aa3271d86b5 100644
> --- a/drivers/iio/adc/rockchip_saradc.c
> +++ b/drivers/iio/adc/rockchip_saradc.c
> @@ -280,6 +280,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
>   		goto err_pclk;
>   	}
>   
> +	/* Make sure ADC is disabled */
> +	writel_relaxed(0, info->regs + SARADC_CTRL);

I think we should reset the saradc controller.
Since make sure the reset value is 0 and loader-->kernel may even cause 
harm, as my experience on tsadc. (drivers/thermal/rockchip_thermal.c)


e.g.:
/**
* Reset SARADC Controller, reset all saradc registers.
*/
static void rockchip_saradc_reset_controller(struct reset_control *reset)
{
reset_control_assert(reset);
usleep_range(10, 20);
reset_control_deassert(reset);
}

..probe()
{
...
rockchip_saradc_reset_controller();
...
}


-
Caesar

> +
>   	platform_set_drvdata(pdev, indio_dev);
>   
>   	indio_dev->name = dev_name(&pdev->dev);
Guenter Roeck July 26, 2016, 3:22 a.m. UTC | #3
On 07/25/2016 07:51 PM, Caesar Wang wrote:
> Hi Guenter,
>
> Thanks for fixing it.
>
> On 2016年07月26日 03:39, Guenter Roeck wrote:
>> If the ADC is read for the first time, the caller gets a timeout error,
>> and the kernel log shows
>>
>> read channel() error: -110
>>
>> The ADC may be enabled on boot, and needs to be explicitly disabled
>> for a read sequence to work (otherwise there is no completion interrupt).
>> Disaple it explicitly in the probe function.
>>
>> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>> ---
>>   drivers/iio/adc/rockchip_saradc.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
>> index f9ad6c2d6821..6aa3271d86b5 100644
>> --- a/drivers/iio/adc/rockchip_saradc.c
>> +++ b/drivers/iio/adc/rockchip_saradc.c
>> @@ -280,6 +280,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
>>           goto err_pclk;
>>       }
>> +    /* Make sure ADC is disabled */
>> +    writel_relaxed(0, info->regs + SARADC_CTRL);
>
> I think we should reset the saradc controller.
> Since make sure the reset value is 0 and loader-->kernel may even cause harm, as my experience on tsadc. (drivers/thermal/rockchip_thermal.c)
>
>
> e.g.:
> /**
> * Reset SARADC Controller, reset all saradc registers.
> */
> static void rockchip_saradc_reset_controller(struct reset_control *reset)
> {
> reset_control_assert(reset);
> usleep_range(10, 20);
> reset_control_deassert(reset);
> }
>
> ..probe()
> {
> ...
> rockchip_saradc_reset_controller();
> ...
> }
>

Ok, I'll give it a try.

Guenter

>
> -
> Caesar
>
>> +
>>       platform_set_drvdata(pdev, indio_dev);
>>       indio_dev->name = dev_name(&pdev->dev);
>
>
Caesar Wang July 26, 2016, 6:48 a.m. UTC | #4
On 2016年07月26日 11:22, Guenter Roeck wrote:
> On 07/25/2016 07:51 PM, Caesar Wang wrote:
>> Hi Guenter,
>>
>> Thanks for fixing it.
>>
>> On 2016年07月26日 03:39, Guenter Roeck wrote:
>>> If the ADC is read for the first time, the caller gets a timeout error,
>>> and the kernel log shows
>>>
>>> read channel() error: -110
>>>
>>> The ADC may be enabled on boot, and needs to be explicitly disabled
>>> for a read sequence to work (otherwise there is no completion 
>>> interrupt).
>>> Disaple it explicitly in the probe function.
>>>
>>> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
>>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>>> ---
>>>   drivers/iio/adc/rockchip_saradc.c | 3 +++
>>>   1 file changed, 3 insertions(+)
>>>
>>> diff --git a/drivers/iio/adc/rockchip_saradc.c 
>>> b/drivers/iio/adc/rockchip_saradc.c
>>> index f9ad6c2d6821..6aa3271d86b5 100644
>>> --- a/drivers/iio/adc/rockchip_saradc.c
>>> +++ b/drivers/iio/adc/rockchip_saradc.c
>>> @@ -280,6 +280,9 @@ static int rockchip_saradc_probe(struct 
>>> platform_device *pdev)
>>>           goto err_pclk;
>>>       }
>>> +    /* Make sure ADC is disabled */
>>> +    writel_relaxed(0, info->regs + SARADC_CTRL);
>>
>> I think we should reset the saradc controller.
>> Since make sure the reset value is 0 and loader-->kernel may even 
>> cause harm, as my experience on tsadc. 
>> (drivers/thermal/rockchip_thermal.c)
>>
>>
>> e.g.:
>> /**
>> * Reset SARADC Controller, reset all saradc registers.
>> */
>> static void rockchip_saradc_reset_controller(struct reset_control 
>> *reset)
>> {
>> reset_control_assert(reset);
>> usleep_range(10, 20);
>> reset_control_deassert(reset);
>> }
>>
>> ..probe()
>> {
>> ...
>> rockchip_saradc_reset_controller();
>> ...
>> }
>>
>
> Ok, I'll give it a try.
>

I posted it on https://patchwork.kernel.org/patch/9247661/


> Guenter
>
>>
>> -
>> Caesar
>>
>>> +
>>>       platform_set_drvdata(pdev, indio_dev);
>>>       indio_dev->name = dev_name(&pdev->dev);
>>
>>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
Jonathan Cameron Aug. 15, 2016, 6:04 p.m. UTC | #5
On 26/07/16 04:22, Guenter Roeck wrote:
> On 07/25/2016 07:51 PM, Caesar Wang wrote:
>> Hi Guenter,
>>
>> Thanks for fixing it.
>>
>> On 2016年07月26日 03:39, Guenter Roeck wrote:
>>> If the ADC is read for the first time, the caller gets a timeout error,
>>> and the kernel log shows
>>>
>>> read channel() error: -110
>>>
>>> The ADC may be enabled on boot, and needs to be explicitly disabled
>>> for a read sequence to work (otherwise there is no completion interrupt).
>>> Disaple it explicitly in the probe function.
>>>
>>> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
>>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>>> ---
>>>   drivers/iio/adc/rockchip_saradc.c | 3 +++
>>>   1 file changed, 3 insertions(+)
>>>
>>> diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
>>> index f9ad6c2d6821..6aa3271d86b5 100644
>>> --- a/drivers/iio/adc/rockchip_saradc.c
>>> +++ b/drivers/iio/adc/rockchip_saradc.c
>>> @@ -280,6 +280,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
>>>           goto err_pclk;
>>>       }
>>> +    /* Make sure ADC is disabled */
>>> +    writel_relaxed(0, info->regs + SARADC_CTRL);
>>
>> I think we should reset the saradc controller.
>> Since make sure the reset value is 0 and loader-->kernel may even cause harm, as my experience on tsadc. (drivers/thermal/rockchip_thermal.c)
>>
>>
>> e.g.:
>> /**
>> * Reset SARADC Controller, reset all saradc registers.
>> */
>> static void rockchip_saradc_reset_controller(struct reset_control *reset)
>> {
>> reset_control_assert(reset);
>> usleep_range(10, 20);
>> reset_control_deassert(reset);
>> }
>>
>> ..probe()
>> {
>> ...
>> rockchip_saradc_reset_controller();
>> ...
>> }
>>
> 
> Ok, I'll give it a try.
> 
> Guenter
Could you confirm if this patch is superseded by that
change or not?
> 
>>
>> -
>> Caesar
>>
>>> +
>>>       platform_set_drvdata(pdev, indio_dev);
>>>       indio_dev->name = dev_name(&pdev->dev);
>>
>>
> 
> -- 
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Guenter Roeck Aug. 15, 2016, 7:52 p.m. UTC | #6
Hi Jonathan,

On Mon, Aug 15, 2016 at 07:04:31PM +0100, Jonathan Cameron wrote:
> On 26/07/16 04:22, Guenter Roeck wrote:
> > On 07/25/2016 07:51 PM, Caesar Wang wrote:
> >> Hi Guenter,
> >>
> >> Thanks for fixing it.
> >>
> >> On 2016年07月26日 03:39, Guenter Roeck wrote:
> >>> If the ADC is read for the first time, the caller gets a timeout error,
> >>> and the kernel log shows
> >>>
> >>> read channel() error: -110
> >>>
> >>> The ADC may be enabled on boot, and needs to be explicitly disabled
> >>> for a read sequence to work (otherwise there is no completion interrupt).
> >>> Disaple it explicitly in the probe function.
> >>>
> >>> Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
> >>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> >>> ---
> >>>   drivers/iio/adc/rockchip_saradc.c | 3 +++
> >>>   1 file changed, 3 insertions(+)
> >>>
> >>> diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
> >>> index f9ad6c2d6821..6aa3271d86b5 100644
> >>> --- a/drivers/iio/adc/rockchip_saradc.c
> >>> +++ b/drivers/iio/adc/rockchip_saradc.c
> >>> @@ -280,6 +280,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
> >>>           goto err_pclk;
> >>>       }
> >>> +    /* Make sure ADC is disabled */
> >>> +    writel_relaxed(0, info->regs + SARADC_CTRL);
> >>
> >> I think we should reset the saradc controller.
> >> Since make sure the reset value is 0 and loader-->kernel may even cause harm, as my experience on tsadc. (drivers/thermal/rockchip_thermal.c)
> >>
> >>
> >> e.g.:
> >> /**
> >> * Reset SARADC Controller, reset all saradc registers.
> >> */
> >> static void rockchip_saradc_reset_controller(struct reset_control *reset)
> >> {
> >> reset_control_assert(reset);
> >> usleep_range(10, 20);
> >> reset_control_deassert(reset);
> >> }
> >>
> >> ..probe()
> >> {
> >> ...
> >> rockchip_saradc_reset_controller();
> >> ...
> >> }
> >>
> > 
> > Ok, I'll give it a try.
> > 
> > Guenter
> Could you confirm if this patch is superseded by that
> change or not?

Yes, that is correct. The version using the reset has been applied to
chromeos-4.4 [1] with commit 86aeb7c3f ("FROMLIST: iio: adc: rockchip_saradc:
reset saradc controller before programming it").

Thanks,
Guenter

---
[1] https://chromium.googlesource.com/chromiumos/third_party/kernel
diff mbox

Patch

diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index f9ad6c2d6821..6aa3271d86b5 100644
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -280,6 +280,9 @@  static int rockchip_saradc_probe(struct platform_device *pdev)
 		goto err_pclk;
 	}
 
+	/* Make sure ADC is disabled */
+	writel_relaxed(0, info->regs + SARADC_CTRL);
+
 	platform_set_drvdata(pdev, indio_dev);
 
 	indio_dev->name = dev_name(&pdev->dev);