| Message ID | 1470124380-5751-2-git-send-email-nikunj@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Aug 02, 2016 at 01:23:00PM +0530, Nikunj A Dadhania wrote: > Missed the following bit in the instruction coding. > > src1 ← EXTZ(RA(56:63)) > > Reported-by: Anton Blanchard <anton@samba.org> > Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> > --- > > Can be squashed with the original commit Done. > > target-ppc/translate.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index dc89e6a..14f4b68 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -867,6 +867,7 @@ static void gen_cmprb(DisasContext *ctx) > tcg_gen_trunc_tl_i32(src1, cpu_gpr[rA(ctx->opcode)]); > tcg_gen_trunc_tl_i32(src2, cpu_gpr[rB(ctx->opcode)]); > > + tcg_gen_andi_i32(src1, src1, 0xFF); > tcg_gen_ext8u_i32(src2lo, src2); > tcg_gen_shri_i32(src2, src2, 8); > tcg_gen_ext8u_i32(src2hi, src2);
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index dc89e6a..14f4b68 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -867,6 +867,7 @@ static void gen_cmprb(DisasContext *ctx) tcg_gen_trunc_tl_i32(src1, cpu_gpr[rA(ctx->opcode)]); tcg_gen_trunc_tl_i32(src2, cpu_gpr[rB(ctx->opcode)]); + tcg_gen_andi_i32(src1, src1, 0xFF); tcg_gen_ext8u_i32(src2lo, src2); tcg_gen_shri_i32(src2, src2, 8); tcg_gen_ext8u_i32(src2hi, src2);
Missed the following bit in the instruction coding. src1 ← EXTZ(RA(56:63)) Reported-by: Anton Blanchard <anton@samba.org> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> --- Can be squashed with the original commit target-ppc/translate.c | 1 + 1 file changed, 1 insertion(+)