diff mbox

[2/2] drm/i915: add Ivy Bridge page flip support

Message ID 20110616121854.02611ef5@jbarnes-desktop (mailing list archive)
State New, archived
Headers show

Commit Message

Jesse Barnes June 16, 2011, 7:18 p.m. UTC
Updated with comment.

Comments

Paul Menzel June 16, 2011, 9:20 p.m. UTC | #1
Am Donnerstag, den 16.06.2011, 12:18 -0700 schrieb Jesse Barnes:
> Updated with comment.
> 
> -- 
> Jesse Barnes, Intel Open Source Technology Center
> 
> >From 41bdb7457beb023faa0d465f483ab793ba8896e1 Mon Sep 17 00:00:00 2001
> From: Jesse Barnes <jbarnes@virtuousgeek.org>
> Date: Tue, 14 Jun 2011 11:08:03 -0700
> Subject: [PATCH] drm/i915: add Ivy Bridge page flip support
> 
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   36 ++++++++++++++++++++++++++++++++++
>  1 files changed, 36 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 37e74e9..9446f4e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6412,6 +6412,39 @@ out:
>  	return ret;
>  }
>  
> +/*
> + * On gen7 we currently use the blit ring because (in early silicon at least)
> + * the render ring doesn't give us interrpts for page flip completion, which

inter*u*pts

> + * means clients will hang after the first flip is queued.  Fortunately the
> + * blit ring generates interrupts properly, so use it instead.
> + */

[…]


Thanks,

Paul
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 37e74e9..9446f4e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6412,6 +6412,39 @@  out:
 	return ret;
 }
 
+/*
+ * On gen7 we currently use the blit ring because (in early silicon at least)
+ * the render ring doesn't give us interrpts for page flip completion, which
+ * means clients will hang after the first flip is queued.  Fortunately the
+ * blit ring generates interrupts properly, so use it instead.
+ */
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
+	int ret;
+
+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
+	if (ret)
+		goto out;
+
+	ret = intel_ring_begin(ring, 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
+	intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(ring, (obj->gtt_offset));
+	intel_ring_emit(ring, (MI_NOOP));
+	intel_ring_advance(ring);
+out:
+	return ret;
+}
+
 static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
@@ -7759,6 +7792,9 @@  static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }