| Message ID | 1470768327-14932-17-git-send-email-carlos.santa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Aug 09, 2016 at 11:45:22AM -0700, Carlos Santa wrote: > Moving all GPU features to the platform definition allows for > - standard place when adding new features from new platforms > - possible to see supported features when dumping struct > definitions > > Signed-off-by: Carlos Santa <carlos.santa@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 ++- > drivers/gpu/drm/i915/i915_pci.c | 5 +++++ > 2 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 729a91b..919ae65 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -778,6 +778,7 @@ struct intel_csr { > func(has_rc6p) sep \ > func(has_dp_mst) sep \ > func(has_gmbus_irq) sep \ > + func(has_hw_contexts) sep \ > func(has_pipe_cxsr) sep \ > func(has_hotplug) sep \ > func(cursor_needs_physical) sep \ > @@ -2729,7 +2730,7 @@ struct drm_i915_cmd_table { > HAS_EDRAM(dev)) > #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) > > -#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) > +#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->has_hw_contexts) > #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8) > #define USES_PPGTT(dev) (i915.enable_ppgtt) > #define USES_FULL_PPGTT(dev) (i915.enable_ppgtt >= 2) > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 3cd0d8f..9d42b68 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -196,6 +196,7 @@ static const struct intel_device_info intel_ironlake_m_info = { > .has_llc = 1, \ > .has_rc6 = 1, \ > .has_rc6p = 1, \ > + .has_hw_contexts = 1, \ > .has_gmbus_irq = 1, \ > GEN_DEFAULT_PIPEOFFSETS, \ > CURSOR_OFFSETS > @@ -218,6 +219,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { > .has_rc6 = 1, \ > .has_rc6p = 1, \ > .has_gmbus_irq = 1, \ > + .has_hw_contexts = 1, \ > GEN_DEFAULT_PIPEOFFSETS, \ > IVB_CURSOR_OFFSETS > > @@ -244,6 +246,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { > .has_runtime_pm = 1, \ > .has_rc6 = 1, \ > .has_gmbus_irq = 1, \ > + .has_hw_contexts = 1, \ > .need_gfx_hws = 1, .has_hotplug = 1, \ > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .display_mmio_offset = VLV_DISPLAY_BASE, \ > @@ -298,6 +301,7 @@ static const struct intel_device_info intel_cherryview_info = { > .has_resource_streamer = 1, > .has_rc6 = 1, > .has_gmbus_irq = 1, > + .has_hw_contexts = 1, > .display_mmio_offset = VLV_DISPLAY_BASE, > GEN_CHV_PIPEOFFSETS, > CURSOR_OFFSETS, > @@ -335,6 +339,7 @@ static const struct intel_device_info intel_broxton_info = { > .has_rc6 = 1, > .has_dp_mst = 1, > .has_gmbus_irq = 1, > + .has_hw_contexts = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > BDW_COLORS, > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 729a91b..919ae65 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -778,6 +778,7 @@ struct intel_csr { func(has_rc6p) sep \ func(has_dp_mst) sep \ func(has_gmbus_irq) sep \ + func(has_hw_contexts) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ func(cursor_needs_physical) sep \ @@ -2729,7 +2730,7 @@ struct drm_i915_cmd_table { HAS_EDRAM(dev)) #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) -#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) +#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->has_hw_contexts) #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8) #define USES_PPGTT(dev) (i915.enable_ppgtt) #define USES_FULL_PPGTT(dev) (i915.enable_ppgtt >= 2) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 3cd0d8f..9d42b68 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -196,6 +196,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_llc = 1, \ .has_rc6 = 1, \ .has_rc6p = 1, \ + .has_hw_contexts = 1, \ .has_gmbus_irq = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ CURSOR_OFFSETS @@ -218,6 +219,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .has_rc6 = 1, \ .has_rc6p = 1, \ .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS @@ -244,6 +246,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { .has_runtime_pm = 1, \ .has_rc6 = 1, \ .has_gmbus_irq = 1, \ + .has_hw_contexts = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -298,6 +301,7 @@ static const struct intel_device_info intel_cherryview_info = { .has_resource_streamer = 1, .has_rc6 = 1, .has_gmbus_irq = 1, + .has_hw_contexts = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -335,6 +339,7 @@ static const struct intel_device_info intel_broxton_info = { .has_rc6 = 1, .has_dp_mst = 1, .has_gmbus_irq = 1, + .has_hw_contexts = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, BDW_COLORS,
Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.santa@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/i915_pci.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-)