| Message ID | 1472063379-717-1-git-send-email-dianders@chromium.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Stephen Boyd |
| Headers | show |
Am Mittwoch, 24. August 2016, 11:29:39 schrieb Douglas Anderson: > From: Xing Zheng <zhengxing@rock-chips.com> > > We don't have code to handle any of the noc clocks in rk3399 and they're > all just listed as critical clocks. Let's do the same for > aclk_emmc_noc. > > Without this clock being marked as critical we have problems around > suspend/resume after commit 20c389e656a8 ("clk: rockchip: fix incorrect > aclk_emmc source gate bits on rk3399"). Before that change we were > presumably not actually gating any of these clocks because we were > setting the wrong gate. > > Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> > Signed-off-by: Douglas Anderson <dianders@chromium.org> applied to my clk-fixes branch Thanks Heiko -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index e445cd64952a..ede6c475b537 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -1489,6 +1489,7 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = { "hclk_perilp1", "hclk_perilp1_noc", "aclk_dmac0_perilp", + "aclk_emmc_noc", "gpll_hclk_perilp1_src", "gpll_aclk_perilp0_src", "gpll_aclk_perihp_src",