diff mbox

arm64: dts: rockchip: set to CCI clock of RK3399 to 600M

Message ID 1472169644-32560-1-git-send-email-wxt@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Caesar Wang Aug. 26, 2016, midnight UTC 
From: Shunqian Zheng <zhengsq@rock-chips.com>

Per testing, this can reduce the memory latency and d8 gets
better socres.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Heiko Stuebner Aug. 26, 2016, 11:14 a.m. UTC | #1 
Am Freitag, 26. August 2016, 08:00:44 schrieb Caesar Wang:
> From: Shunqian Zheng <zhengsq@rock-chips.com>
> 
> Per testing, this can reduce the memory latency and d8 gets
> better socres.
> 
> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

applied to my dts64 branch for 4.9

Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index bc86e8c..962f65d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -935,7 +935,7 @@ 
 			<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
 			<&cru PCLK_PERIHP>,
 			<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
-			<&cru PCLK_PERILP0>,
+			<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
 			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
 		assigned-clock-rates =
 			 <594000000>,  <800000000>,
@@ -943,7 +943,7 @@ 
 			 <150000000>,   <75000000>,
 			  <37500000>,
 			 <100000000>,  <100000000>,
-			  <50000000>,
+			  <50000000>, <600000000>,
 			 <100000000>,   <50000000>;
 	};