Message ID | 1473076452-19795-5-git-send-email-rabin.vincent@axis.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 09/05/2016 04:54 AM, Rabin Vincent wrote: > From: "Edgar E. Iglesias" <edgar@axis.com> > > Icount may choose to abort and recompile a TB at any load/store. We > need to sync the CC state at these insns. > > Signed-off-by: Edgar E. Iglesias <edgar@axis.com> > Signed-off-by: Rabin Vincent <rabinv@axis.com> > --- > target-cris/translate.c | 9 +++++++++ > target-cris/translate_v10.c | 3 +++ > 2 files changed, 12 insertions(+) > > diff --git a/target-cris/translate.c b/target-cris/translate.c > index f4a8d7d..c280e24 100644 > --- a/target-cris/translate.c > +++ b/target-cris/translate.c > @@ -1098,6 +1098,9 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr) > { > int mem_index = cpu_mmu_index(&dc->cpu->env, false); > > + /* Due to icount, we need to update the CC flags on load/stores. */ > + cris_evaluate_flags(dc); > + This is not the proper way to handle this. You should arrange to sync the CC flags in restore_state_to_opc. There are plenty of examples in the tree you can examine. It looks like there's plenty of room for cleanup for cris here. r~
On Mon, Sep 05, 2016 at 12:02:14PM -0700, Richard Henderson wrote: > On 09/05/2016 04:54 AM, Rabin Vincent wrote: > >From: "Edgar E. Iglesias" <edgar@axis.com> > > > >Icount may choose to abort and recompile a TB at any load/store. We > >need to sync the CC state at these insns. > > > >Signed-off-by: Edgar E. Iglesias <edgar@axis.com> > >Signed-off-by: Rabin Vincent <rabinv@axis.com> > >--- > > target-cris/translate.c | 9 +++++++++ > > target-cris/translate_v10.c | 3 +++ > > 2 files changed, 12 insertions(+) > > > >diff --git a/target-cris/translate.c b/target-cris/translate.c > >index f4a8d7d..c280e24 100644 > >--- a/target-cris/translate.c > >+++ b/target-cris/translate.c > >@@ -1098,6 +1098,9 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr) > > { > > int mem_index = cpu_mmu_index(&dc->cpu->env, false); > > > >+ /* Due to icount, we need to update the CC flags on load/stores. */ > >+ cris_evaluate_flags(dc); > >+ > > This is not the proper way to handle this. You should arrange to sync the > CC flags in restore_state_to_opc. There are plenty of examples in the tree > you can examine. It looks like there's plenty of room for cleanup for cris > here. > Thanks, agreed. Rabin, most of the CRIS patches that I left in the AXIS tree without upstreaming need more work. I don't mind you posting them but keep in mind that there's not much that can go up without tidy up. Best regards, Edgar
diff --git a/target-cris/translate.c b/target-cris/translate.c index f4a8d7d..c280e24 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -1098,6 +1098,9 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr) { int mem_index = cpu_mmu_index(&dc->cpu->env, false); + /* Due to icount, we need to update the CC flags on load/stores. */ + cris_evaluate_flags(dc); + /* If we get a fault on a delayslot we must keep the jmp state in the cpu-state to be able to re-execute the jmp. */ if (dc->delayed_branch == 1) { @@ -1112,6 +1115,9 @@ static void gen_load(DisasContext *dc, TCGv dst, TCGv addr, { int mem_index = cpu_mmu_index(&dc->cpu->env, false); + /* Due to icount, we need to update the CC flags on load/stores. */ + cris_evaluate_flags(dc); + /* If we get a fault on a delayslot we must keep the jmp state in the cpu-state to be able to re-execute the jmp. */ if (dc->delayed_branch == 1) { @@ -1127,6 +1133,9 @@ static void gen_store (DisasContext *dc, TCGv addr, TCGv val, { int mem_index = cpu_mmu_index(&dc->cpu->env, false); + /* Due to icount, we need to update the CC flags on load/stores. */ + cris_evaluate_flags(dc); + /* If we get a fault on a delayslot we must keep the jmp state in the cpu-state to be able to re-execute the jmp. */ if (dc->delayed_branch == 1) { diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 4707a18..a3da425 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -99,6 +99,9 @@ static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val, { int mem_index = cpu_mmu_index(&dc->cpu->env, false); + /* Due to icount, we need to update the CC flags on load/stores. */ + cris_evaluate_flags(dc); + /* If we get a fault on a delayslot we must keep the jmp state in the cpu-state to be able to re-execute the jmp. */ if (dc->delayed_branch == 1) {