| Message ID | 1469200685-13695-1-git-send-email-michael@walle.cc (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 07/22/2016 05:18 PM, Michael Walle wrote: > 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is > not set which enables the 64 bit mode for this MMU model. Memory addresses > are truncated to 32 bit, which results in "Invalid data memory access" > error messages. Fix it by setting the MSR_CM bit for this MMU model. > > Signed-off-by: Michael Walle <michael@walle.cc> Yup, I guess that's about as smart as we have to be :). Reviewed-by: Alexander Graf <agraf@suse.de> Alex > --- > > This is a kind of a v2 patch. The did the fix in the wrong place: > http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05409.html > > linux-user/main.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/linux-user/main.c b/linux-user/main.c > index 462e820..bac2cb0 100644 > --- a/linux-user/main.c > +++ b/linux-user/main.c > @@ -4626,10 +4626,11 @@ int main(int argc, char **argv, char **envp) > int i; > > #if defined(TARGET_PPC64) > + int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF; > #if defined(TARGET_ABI32) > - env->msr &= ~((target_ulong)1 << MSR_SF); > + env->msr &= ~((target_ulong)1 << flag); > #else > - env->msr |= (target_ulong)1 << MSR_SF; > + env->msr |= (target_ulong)1 << flag; > #endif > #endif > env->nip = regs->nip;
Am 2016-07-22 17:57, schrieb Alexander Graf: > On 07/22/2016 05:18 PM, Michael Walle wrote: >> 64 bit user mode doesn't work for the e5500 core because the MSR_CM >> bit is >> not set which enables the 64 bit mode for this MMU model. Memory >> addresses >> are truncated to 32 bit, which results in "Invalid data memory access" >> error messages. Fix it by setting the MSR_CM bit for this MMU model. >> >> Signed-off-by: Michael Walle <michael@walle.cc> > > Yup, I guess that's about as smart as we have to be :). > > > Reviewed-by: Alexander Graf <agraf@suse.de> ping? -michael
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: > Am 2016-07-22 17:57, schrieb Alexander Graf: > >On 07/22/2016 05:18 PM, Michael Walle wrote: > >>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit > >>is > >>not set which enables the 64 bit mode for this MMU model. Memory > >>addresses > >>are truncated to 32 bit, which results in "Invalid data memory access" > >>error messages. Fix it by setting the MSR_CM bit for this MMU model. > >> > >>Signed-off-by: Michael Walle <michael@walle.cc> > > > >Yup, I guess that's about as smart as we have to be :). > > > > > >Reviewed-by: Alexander Graf <agraf@suse.de> > > ping? sorry. slipped through - looks good, but do we want this to qemu 2.7, or is next goot enough? Riku
Am 2016-08-16 15:41, schrieb Riku Voipio: > On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: >> Am 2016-07-22 17:57, schrieb Alexander Graf: >> >On 07/22/2016 05:18 PM, Michael Walle wrote: >> >>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit >> >>is >> >>not set which enables the 64 bit mode for this MMU model. Memory >> >>addresses >> >>are truncated to 32 bit, which results in "Invalid data memory access" >> >>error messages. Fix it by setting the MSR_CM bit for this MMU model. >> >> >> >>Signed-off-by: Michael Walle <michael@walle.cc> >> > >> >Yup, I guess that's about as smart as we have to be :). >> > >> > >> >Reviewed-by: Alexander Graf <agraf@suse.de> >> >> ping? > > sorry. slipped through - looks good, but do we want this to qemu 2.7, > or is next goot enough? Hi Riku, mhh, personally I would prefer to see it in 2.7, too, given that it is just a bugfix. But it only makes sense with the patch that I've just posted to the mailinglist ("linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP"). Therefore, if it is too late for the latter, the first might also be just scheduled for next. -michael
Am 2016-08-16 15:56, schrieb Michael Walle: > Am 2016-08-16 15:41, schrieb Riku Voipio: >> On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: >>> Am 2016-07-22 17:57, schrieb Alexander Graf: >>> >On 07/22/2016 05:18 PM, Michael Walle wrote: >>> >>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit >>> >>is >>> >>not set which enables the 64 bit mode for this MMU model. Memory >>> >>addresses >>> >>are truncated to 32 bit, which results in "Invalid data memory access" >>> >>error messages. Fix it by setting the MSR_CM bit for this MMU model. >>> >> >>> >>Signed-off-by: Michael Walle <michael@walle.cc> >>> > >>> >Yup, I guess that's about as smart as we have to be :). >>> > >>> > >>> >Reviewed-by: Alexander Graf <agraf@suse.de> >>> >>> ping? >> >> sorry. slipped through - looks good, but do we want this to qemu 2.7, >> or is next goot enough? > > Hi Riku, > > mhh, personally I would prefer to see it in 2.7, too, given that it is > just a bugfix. But it only makes sense with the patch that I've just > posted to the mailinglist ("linux-user: ppc64: fix ARCH_206 bit in > AT_HWCAP"). Therefore, if it is too late for the latter, the first > might also be just scheduled for next. ping. this is still missing. Since David pulled the "linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP" patch. This is the last missing piece to make yocto/ppc64 user-mode emulation work ;) -michael
On Wed, Sep 21, 2016 at 12:59:58PM +0200, Michael Walle wrote: > Am 2016-08-16 15:56, schrieb Michael Walle: > >Am 2016-08-16 15:41, schrieb Riku Voipio: > >>On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: > >>>Am 2016-07-22 17:57, schrieb Alexander Graf: > >>>>On 07/22/2016 05:18 PM, Michael Walle wrote: > >>>>>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit > >>>>>is > >>>>>not set which enables the 64 bit mode for this MMU model. Memory > >>>>>addresses > >>>>>are truncated to 32 bit, which results in "Invalid data memory access" > >>>>>error messages. Fix it by setting the MSR_CM bit for this MMU model. > >>>>> > >>>>>Signed-off-by: Michael Walle <michael@walle.cc> > >>>> > >>>>Yup, I guess that's about as smart as we have to be :). > >>>> > >>>> > >>>>Reviewed-by: Alexander Graf <agraf@suse.de> > >>> > >>>ping? > >> > >>sorry. slipped through - looks good, but do we want this to qemu 2.7, > >>or is next goot enough? > > > >Hi Riku, > > > >mhh, personally I would prefer to see it in 2.7, too, given that it is > >just a bugfix. But it only makes sense with the patch that I've just > >posted to the mailinglist ("linux-user: ppc64: fix ARCH_206 bit in > >AT_HWCAP"). Therefore, if it is too late for the latter, the first > >might also be just scheduled for next. > > ping. this is still missing. Since David pulled the "linux-user: ppc64: fix > ARCH_206 bit in AT_HWCAP" patch. This is the last missing piece to make > yocto/ppc64 user-mode emulation work ;) Applied. thanks! Riku
diff --git a/linux-user/main.c b/linux-user/main.c index 462e820..bac2cb0 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -4626,10 +4626,11 @@ int main(int argc, char **argv, char **envp) int i; #if defined(TARGET_PPC64) + int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF; #if defined(TARGET_ABI32) - env->msr &= ~((target_ulong)1 << MSR_SF); + env->msr &= ~((target_ulong)1 << flag); #else - env->msr |= (target_ulong)1 << MSR_SF; + env->msr |= (target_ulong)1 << flag; #endif #endif env->nip = regs->nip;
64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is not set which enables the 64 bit mode for this MMU model. Memory addresses are truncated to 32 bit, which results in "Invalid data memory access" error messages. Fix it by setting the MSR_CM bit for this MMU model. Signed-off-by: Michael Walle <michael@walle.cc> --- This is a kind of a v2 patch. The did the fix in the wrong place: http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05409.html linux-user/main.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)