| Message ID | 147455594057.8519.18153674804012845873.stgit@brijesh-build-machine (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 22/09/2016 16:52, Brijesh Singh wrote: > The patch adds the following new APIs: > - cpu_physical_memory_read_debug > - cpu_physical_memory_write_debug > - cpu_physical_memory_rw_debug > - ldl_phys_debug > - ldq_phys_debug > > The idea behind this patch is that if all the qemu monitor memory dumps > and gdbserver accesses are done through these common APIs then in future > we can define some kind of global debug policy to control debug behavior. > > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> > --- > exec.c | 32 ++++++++++++++++++++++++++++++++ > include/exec/cpu-common.h | 15 +++++++++++++++ > 2 files changed, 47 insertions(+) > > diff --git a/exec.c b/exec.c > index 0989933..9d0128e 100644 > --- a/exec.c > +++ b/exec.c > @@ -3105,6 +3105,30 @@ uint32_t ldl_phys(AddressSpace *as, hwaddr addr) > return address_space_ldl(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); > } > > +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr) > +{ > + MemTxAttrs attrs = MEMTXATTRS_DEBUG; > + int asidx = cpu_asidx_from_attrs(cpu, attrs); > + uint32_t val; > + > + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, > + addr, (void *) &val, > + 4, attrs, READ_DATA); > + return tswap32(val); > +} > + > +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr) > +{ > + MemTxAttrs attrs = MEMTXATTRS_DEBUG; > + int asidx = cpu_asidx_from_attrs(cpu, attrs); > + uint64_t val; > + > + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, > + addr, (void *) &val, > + 8, attrs, READ_DATA); > + return val; > +} > + > uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr) > { > return address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); > @@ -3615,6 +3639,14 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val) > address_space_stq_be(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); > } > > +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, > + int len, int is_write) > +{ > + cpu_physical_memory_rw_debug_internal(&address_space_memory, addr, > + buf, len, MEMTXATTRS_DEBUG, > + is_write ? WRITE_DATA : READ_DATA); > +} > + > /* virtual memory access for debug (includes writing to ROM) */ > int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, > uint8_t *buf, int len, int is_write) > diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h > index 520dae0..90598d4 100644 > --- a/include/exec/cpu-common.h > +++ b/include/exec/cpu-common.h > @@ -61,6 +61,8 @@ const char *qemu_ram_get_idstr(RAMBlock *rb); > > void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, > int len, int is_write); > +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, > + int len, int is_write); > static inline void cpu_physical_memory_read(hwaddr addr, > void *buf, int len) > { > @@ -71,6 +73,19 @@ static inline void cpu_physical_memory_write(hwaddr addr, > { > cpu_physical_memory_rw(addr, (void *)buf, len, 1); > } > +static inline void cpu_physical_memory_read_debug(hwaddr addr, > + void *buf, int len) > +{ > + cpu_physical_memory_rw_debug(addr, buf, len, 0); > +} > +static inline void cpu_physical_memory_write_debug(hwaddr addr, > + const void *buf, int len) > +{ > + cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1); > +} > +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr); > +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr); > + > void *cpu_physical_memory_map(hwaddr addr, > hwaddr *plen, > int is_write); >
diff --git a/exec.c b/exec.c index 0989933..9d0128e 100644 --- a/exec.c +++ b/exec.c @@ -3105,6 +3105,30 @@ uint32_t ldl_phys(AddressSpace *as, hwaddr addr) return address_space_ldl(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); } +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs = MEMTXATTRS_DEBUG; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint32_t val; + + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 4, attrs, READ_DATA); + return tswap32(val); +} + +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs = MEMTXATTRS_DEBUG; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint64_t val; + + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 8, attrs, READ_DATA); + return val; +} + uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr) { return address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); @@ -3615,6 +3639,14 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val) address_space_stq_be(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write) +{ + cpu_physical_memory_rw_debug_internal(&address_space_memory, addr, + buf, len, MEMTXATTRS_DEBUG, + is_write ? WRITE_DATA : READ_DATA); +} + /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, int len, int is_write) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 520dae0..90598d4 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -61,6 +61,8 @@ const char *qemu_ram_get_idstr(RAMBlock *rb); void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, int len, int is_write); +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, int len) { @@ -71,6 +73,19 @@ static inline void cpu_physical_memory_write(hwaddr addr, { cpu_physical_memory_rw(addr, (void *)buf, len, 1); } +static inline void cpu_physical_memory_read_debug(hwaddr addr, + void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, buf, len, 0); +} +static inline void cpu_physical_memory_write_debug(hwaddr addr, + const void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1); +} +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr); +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr); + void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, int is_write);
The patch adds the following new APIs: - cpu_physical_memory_read_debug - cpu_physical_memory_write_debug - cpu_physical_memory_rw_debug - ldl_phys_debug - ldq_phys_debug The idea behind this patch is that if all the qemu monitor memory dumps and gdbserver accesses are done through these common APIs then in future we can define some kind of global debug policy to control debug behavior. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> --- exec.c | 32 ++++++++++++++++++++++++++++++++ include/exec/cpu-common.h | 15 +++++++++++++++ 2 files changed, 47 insertions(+)