diff mbox

[v5,03/12] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT

Message ID 1475678440-3525-4-git-send-email-riteshh@codeaurora.org (mailing list archive)
State New, archived
Headers show

Commit Message

Ritesh Harjani Oct. 5, 2016, 2:40 p.m. UTC
This adds support for sdhc-msm controllers to get supported
clk-rates from DT. sdhci-msm would need it's own set_clock
ops to be implemented. For this, supported clk-rates needs
to be populated in sdhci_msm_pltfm_data.

Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
 .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
 drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
 2 files changed, 49 insertions(+)

Comments

Adrian Hunter Oct. 10, 2016, 9:35 a.m. UTC | #1
On 05/10/16 17:40, Ritesh Harjani wrote:
> This adds support for sdhc-msm controllers to get supported
> clk-rates from DT. sdhci-msm would need it's own set_clock
> ops to be implemented. For this, supported clk-rates needs
> to be populated in sdhci_msm_pltfm_data.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> ---
>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>  drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
>  2 files changed, 49 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 485483a..6a83b38 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -17,6 +17,7 @@ Required properties:
>  	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
>  	"core"	- SDC MMC clock (MCLK) (required)
>  	"bus"	- SDCC bus voter clock (optional)
> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
>  
>  Example:
>  
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 85ddaae..042ecb2 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -81,6 +81,8 @@ struct sdhci_msm_host {
>  	struct clk *clk;	/* main SD/MMC bus clock */
>  	struct clk *pclk;	/* SDHC peripheral bus clock */
>  	struct clk *bus_clk;	/* SDHC bus voter clock */
> +	u32 *clk_table;
> +	int clk_table_sz;
>  	struct mmc_host *mmc;
>  	bool use_14lpp_dll_reset;
>  };
> @@ -582,6 +584,50 @@ static const struct sdhci_pltfm_data sdhci_msm_pdata = {
>  	.ops = &sdhci_msm_ops,
>  };
>  
> +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,
> +				u32 **table, int *size)

It is nice to align to the open parenthesis.  Have a look at the checks from
checkpatch --strict

> +{
> +	struct device_node *np = dev->of_node;
> +	int count, ret;
> +	u32 *arr;
> +
> +	count = of_property_count_elems_of_size(np, prop_name, sizeof(u32));

Shouldn't this be of_property_count_u32_elems()

> +	if (count < 0) {
> +		dev_warn(dev, "%s: Invalid dt property, err(%d)\n",
> +				prop_name, count);
> +		return count;
> +	}
> +
> +	arr = kcalloc(count, sizeof(*arr), GFP_KERNEL);
> +	if (!arr)
> +		return -ENOMEM;
> +
> +	ret = of_property_read_u32_array(np, prop_name, arr, count);
> +	if (ret) {
> +		kfree(arr);
> +		dev_warn(dev, "%s Invalid dt array property, err(%d)\n",

'err(%d)' is an unusual style for printing error numbers.  'error %d' looks
better.

Also in some messages you have 'DT' and others 'dt'.  Also here it is '%s'
but above '%s:', and some messages start with a lower case letter and some
upper case.  Please try to make everything consistent.

> +				prop_name, ret);
> +		return ret;
> +	}
> +	*table = arr;
> +	*size = count;
> +	return 0;
> +}
> +
> +void sdhci_msm_populate_dt(struct device *dev,
> +						struct sdhci_msm_host *msm_host)

Align to open parenthesis

> +{
> +	int table_sz = 0;
> +	u32 *table = NULL;
> +
> +	if (sdhci_msm_dt_get_array(dev, "clk-rates", &table, &table_sz)) {
> +		dev_warn(dev, "failed in DT parsing for supported clk-rates\n");
> +		return;
> +	}
> +	msm_host->clk_table = table;
> +	msm_host->clk_table_sz = table_sz;
> +}
> +
>  static int sdhci_msm_probe(struct platform_device *pdev)
>  {
>  	struct sdhci_host *host;
> @@ -608,6 +654,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>  
>  	sdhci_get_of_property(pdev);
>  
> +	sdhci_msm_populate_dt(&pdev->dev, msm_host);
> +
>  	/* Setup SDCC bus voter clock. */
>  	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
>  	if (!IS_ERR(msm_host->bus_clk)) {
> 

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Ritesh Harjani Oct. 10, 2016, 11 a.m. UTC | #2
Hi Adrian,

Thanks for the review. I will address your comments.
Responses inline.

--
Regards
Ritesh

On 10/10/2016 3:05 PM, Adrian Hunter wrote:
> On 05/10/16 17:40, Ritesh Harjani wrote:
>> This adds support for sdhc-msm controllers to get supported
>> clk-rates from DT. sdhci-msm would need it's own set_clock
>> ops to be implemented. For this, supported clk-rates needs
>> to be populated in sdhci_msm_pltfm_data.
>>
>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>> ---
>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>  drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
>>  2 files changed, 49 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> index 485483a..6a83b38 100644
>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> @@ -17,6 +17,7 @@ Required properties:
>>  	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
>>  	"core"	- SDC MMC clock (MCLK) (required)
>>  	"bus"	- SDCC bus voter clock (optional)
>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
>>
>>  Example:
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index 85ddaae..042ecb2 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -81,6 +81,8 @@ struct sdhci_msm_host {
>>  	struct clk *clk;	/* main SD/MMC bus clock */
>>  	struct clk *pclk;	/* SDHC peripheral bus clock */
>>  	struct clk *bus_clk;	/* SDHC bus voter clock */
>> +	u32 *clk_table;
>> +	int clk_table_sz;
>>  	struct mmc_host *mmc;
>>  	bool use_14lpp_dll_reset;
>>  };
>> @@ -582,6 +584,50 @@ static const struct sdhci_pltfm_data sdhci_msm_pdata = {
>>  	.ops = &sdhci_msm_ops,
>>  };
>>
>> +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,
>> +				u32 **table, int *size)
>
> It is nice to align to the open parenthesis.  Have a look at the checks from
> checkpatch --strict
Sure, will do that.

>
>> +{
>> +	struct device_node *np = dev->of_node;
>> +	int count, ret;
>> +	u32 *arr;
>> +
>> +	count = of_property_count_elems_of_size(np, prop_name, sizeof(u32));
>
> Shouldn't this be of_property_count_u32_elems()
Yes, I will make the change.

>
>> +	if (count < 0) {
will change this to below to avoid empty property problem in DT which 
you mentioned in the next patch.
	if (count <= 0) {


>> +		dev_warn(dev, "%s: Invalid dt property, err(%d)\n",
>> +				prop_name, count);
>> +		return count;
>> +	}
>> +
>> +	arr = kcalloc(count, sizeof(*arr), GFP_KERNEL);
>> +	if (!arr)
>> +		return -ENOMEM;
>> +
>> +	ret = of_property_read_u32_array(np, prop_name, arr, count);
>> +	if (ret) {
>> +		kfree(arr);
>> +		dev_warn(dev, "%s Invalid dt array property, err(%d)\n",
>
> 'err(%d)' is an unusual style for printing error numbers.  'error %d' looks
> better.
Done.

>
> Also in some messages you have 'DT' and others 'dt'.  Also here it is '%s'
> but above '%s:', and some messages start with a lower case letter and some
> upper case.  Please try to make everything consistent.
>
Sure thanks.

>> +				prop_name, ret);
>> +		return ret;
>> +	}
>> +	*table = arr;
>> +	*size = count;
>> +	return 0;
>> +}
>> +
>> +void sdhci_msm_populate_dt(struct device *dev,
>> +						struct sdhci_msm_host *msm_host)
>
> Align to open parenthesis
Done.

>
>> +{
>> +	int table_sz = 0;
>> +	u32 *table = NULL;
>> +
>> +	if (sdhci_msm_dt_get_array(dev, "clk-rates", &table, &table_sz)) {
>> +		dev_warn(dev, "failed in DT parsing for supported clk-rates\n");
>> +		return;
>> +	}
>> +	msm_host->clk_table = table;
>> +	msm_host->clk_table_sz = table_sz;
>> +}
>> +
>>  static int sdhci_msm_probe(struct platform_device *pdev)
>>  {
>>  	struct sdhci_host *host;
>> @@ -608,6 +654,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>>
>>  	sdhci_get_of_property(pdev);
>>
>> +	sdhci_msm_populate_dt(&pdev->dev, msm_host);
>> +
>>  	/* Setup SDCC bus voter clock. */
>>  	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
>>  	if (!IS_ERR(msm_host->bus_clk)) {
>>
>
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Rob Herring (Arm) Oct. 10, 2016, 12:57 p.m. UTC | #3
On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
> This adds support for sdhc-msm controllers to get supported
> clk-rates from DT. sdhci-msm would need it's own set_clock
> ops to be implemented. For this, supported clk-rates needs
> to be populated in sdhci_msm_pltfm_data.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> ---
>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>  drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
>  2 files changed, 49 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 485483a..6a83b38 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -17,6 +17,7 @@ Required properties:
>  	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
>  	"core"	- SDC MMC clock (MCLK) (required)
>  	"bus"	- SDCC bus voter clock (optional)
> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.

Why can't some combination of assigned-clock-rates and querying the 
clock provider for rates be used here?

Minimally this would need unit suffix and either be made common or have 
a vendor prefix.

Rob
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Ritesh Harjani Oct. 10, 2016, 4:07 p.m. UTC | #4
Hi Rob,

Thanks for review.

On 10/10/2016 6:27 PM, Rob Herring wrote:
> On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
>> This adds support for sdhc-msm controllers to get supported
>> clk-rates from DT. sdhci-msm would need it's own set_clock
>> ops to be implemented. For this, supported clk-rates needs
>> to be populated in sdhci_msm_pltfm_data.
>>
>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>> ---
>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>  drivers/mmc/host/sdhci-msm.c                       | 48 ++++++++++++++++++++++
>>  2 files changed, 49 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> index 485483a..6a83b38 100644
>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> @@ -17,6 +17,7 @@ Required properties:
>>  	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
>>  	"core"	- SDC MMC clock (MCLK) (required)
>>  	"bus"	- SDCC bus voter clock (optional)
>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
>
> Why can't some combination of assigned-clock-rates and querying the
> clock provider for rates be used here?
 From what I understood, assigned-clock-rates would only work for 
setting some default clock rates for certain clocks by calling
of_clk_set_defaults.

Whereas the requirement here is -
That since SDHC msm directly controls the clk(core clock) at source, 
it's sdhci-msm driver needs to know the supported clk-rates by the 
underlying platform to configure the nearest floor value supported on 
this platform (when the request arrives from the core layer to switch 
the clock).

Hence the table of clk-rates is provided for sdhci-msm.

>
> Minimally this would need unit suffix and either be made common or have
> a vendor prefix.
Sure will this work in that case - "qcom-clk-rates"

>
> Rob
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Rob Herring (Arm) Oct. 10, 2016, 7:29 p.m. UTC | #5
On Mon, Oct 10, 2016 at 11:07 AM, Ritesh Harjani <riteshh@codeaurora.org> wrote:
> Hi Rob,
>
> Thanks for review.
>
> On 10/10/2016 6:27 PM, Rob Herring wrote:
>>
>> On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
>>>
>>> This adds support for sdhc-msm controllers to get supported
>>> clk-rates from DT. sdhci-msm would need it's own set_clock
>>> ops to be implemented. For this, supported clk-rates needs
>>> to be populated in sdhci_msm_pltfm_data.
>>>
>>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>>> ---
>>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>>  drivers/mmc/host/sdhci-msm.c                       | 48
>>> ++++++++++++++++++++++
>>>  2 files changed, 49 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>> index 485483a..6a83b38 100644
>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>> @@ -17,6 +17,7 @@ Required properties:
>>>         "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock)
>>> (required)
>>>         "core"  - SDC MMC clock (MCLK) (required)
>>>         "bus"   - SDCC bus voter clock (optional)
>>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units -
>>> Hz.
>>
>>
>> Why can't some combination of assigned-clock-rates and querying the
>> clock provider for rates be used here?
>
> From what I understood, assigned-clock-rates would only work for setting
> some default clock rates for certain clocks by calling
> of_clk_set_defaults.
>
> Whereas the requirement here is -
> That since SDHC msm directly controls the clk(core clock) at source, it's
> sdhci-msm driver needs to know the supported clk-rates by the underlying
> platform to configure the nearest floor value supported on this platform
> (when the request arrives from the core layer to switch the clock).

Why does clk_round_rate not work for you? That will round down to the
nearest frequency supported.

> Hence the table of clk-rates is provided for sdhci-msm.
>
>>
>> Minimally this would need unit suffix and either be made common or have
>> a vendor prefix.
>
> Sure will this work in that case - "qcom-clk-rates"

"qcom,clk-rates", but I'm not yet convinced this is right.

Rob
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Ritesh Harjani Oct. 11, 2016, 9:06 a.m. UTC | #6
Hi Rob

On 10/11/2016 12:59 AM, Rob Herring wrote:
> On Mon, Oct 10, 2016 at 11:07 AM, Ritesh Harjani <riteshh@codeaurora.org> wrote:
>> Hi Rob,
>>
>> Thanks for review.
>>
>> On 10/10/2016 6:27 PM, Rob Herring wrote:
>>>
>>> On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
>>>>
>>>> This adds support for sdhc-msm controllers to get supported
>>>> clk-rates from DT. sdhci-msm would need it's own set_clock
>>>> ops to be implemented. For this, supported clk-rates needs
>>>> to be populated in sdhci_msm_pltfm_data.
>>>>
>>>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>>>> ---
>>>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>>>  drivers/mmc/host/sdhci-msm.c                       | 48
>>>> ++++++++++++++++++++++
>>>>  2 files changed, 49 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>> index 485483a..6a83b38 100644
>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>> @@ -17,6 +17,7 @@ Required properties:
>>>>         "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock)
>>>> (required)
>>>>         "core"  - SDC MMC clock (MCLK) (required)
>>>>         "bus"   - SDCC bus voter clock (optional)
>>>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units -
>>>> Hz.
>>>
>>>
>>> Why can't some combination of assigned-clock-rates and querying the
>>> clock provider for rates be used here?
>>
>> From what I understood, assigned-clock-rates would only work for setting
>> some default clock rates for certain clocks by calling
>> of_clk_set_defaults.
>>
>> Whereas the requirement here is -
>> That since SDHC msm directly controls the clk(core clock) at source, it's
>> sdhci-msm driver needs to know the supported clk-rates by the underlying
>> platform to configure the nearest floor value supported on this platform
>> (when the request arrives from the core layer to switch the clock).
>
> Why does clk_round_rate not work for you? That will round down to the
> nearest frequency supported.
clk_round_rate will round off to nearest supported "ceil" frequency.
But we require nearest rounded off "floor" frequency.

>
>> Hence the table of clk-rates is provided for sdhci-msm.
>>
>>>
>>> Minimally this would need unit suffix and either be made common or have
>>> a vendor prefix.
>>
>> Sure will this work in that case - "qcom-clk-rates"
>
> "qcom,clk-rates", but I'm not yet convinced this is right.
>
> Rob
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Rob Herring (Arm) Oct. 11, 2016, 12:31 p.m. UTC | #7
On Tue, Oct 11, 2016 at 4:06 AM, Ritesh Harjani <riteshh@codeaurora.org> wrote:
> Hi Rob
>
>
> On 10/11/2016 12:59 AM, Rob Herring wrote:
>>
>> On Mon, Oct 10, 2016 at 11:07 AM, Ritesh Harjani <riteshh@codeaurora.org>
>> wrote:
>>>
>>> Hi Rob,
>>>
>>> Thanks for review.
>>>
>>> On 10/10/2016 6:27 PM, Rob Herring wrote:
>>>>
>>>>
>>>> On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
>>>>>
>>>>>
>>>>> This adds support for sdhc-msm controllers to get supported
>>>>> clk-rates from DT. sdhci-msm would need it's own set_clock
>>>>> ops to be implemented. For this, supported clk-rates needs
>>>>> to be populated in sdhci_msm_pltfm_data.
>>>>>
>>>>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>>>>> ---
>>>>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>>>>  drivers/mmc/host/sdhci-msm.c                       | 48
>>>>> ++++++++++++++++++++++
>>>>>  2 files changed, 49 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>> index 485483a..6a83b38 100644
>>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>> @@ -17,6 +17,7 @@ Required properties:
>>>>>         "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock)
>>>>> (required)
>>>>>         "core"  - SDC MMC clock (MCLK) (required)
>>>>>         "bus"   - SDCC bus voter clock (optional)
>>>>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units
>>>>> -
>>>>> Hz.
>>>>
>>>>
>>>>
>>>> Why can't some combination of assigned-clock-rates and querying the
>>>> clock provider for rates be used here?
>>>
>>>
>>> From what I understood, assigned-clock-rates would only work for setting
>>> some default clock rates for certain clocks by calling
>>> of_clk_set_defaults.
>>>
>>> Whereas the requirement here is -
>>> That since SDHC msm directly controls the clk(core clock) at source, it's
>>> sdhci-msm driver needs to know the supported clk-rates by the underlying
>>> platform to configure the nearest floor value supported on this platform
>>> (when the request arrives from the core layer to switch the clock).
>>
>>
>> Why does clk_round_rate not work for you? That will round down to the
>> nearest frequency supported.
>
> clk_round_rate will round off to nearest supported "ceil" frequency.
> But we require nearest rounded off "floor" frequency.

Then fix the clk framework to do what you want. This doesn't need to be in DT.

Rob
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Ritesh Harjani Nov. 7, 2016, 11:21 a.m. UTC | #8
Hi Rob,

On 10/11/2016 6:01 PM, Rob Herring wrote:
> On Tue, Oct 11, 2016 at 4:06 AM, Ritesh Harjani <riteshh@codeaurora.org> wrote:
>> Hi Rob
>>
>>
>> On 10/11/2016 12:59 AM, Rob Herring wrote:
>>>
>>> On Mon, Oct 10, 2016 at 11:07 AM, Ritesh Harjani <riteshh@codeaurora.org>
>>> wrote:
>>>>
>>>> Hi Rob,
>>>>
>>>> Thanks for review.
>>>>
>>>> On 10/10/2016 6:27 PM, Rob Herring wrote:
>>>>>
>>>>>
>>>>> On Wed, Oct 05, 2016 at 08:10:31PM +0530, Ritesh Harjani wrote:
>>>>>>
>>>>>>
>>>>>> This adds support for sdhc-msm controllers to get supported
>>>>>> clk-rates from DT. sdhci-msm would need it's own set_clock
>>>>>> ops to be implemented. For this, supported clk-rates needs
>>>>>> to be populated in sdhci_msm_pltfm_data.
>>>>>>
>>>>>> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
>>>>>> ---
>>>>>>  .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
>>>>>>  drivers/mmc/host/sdhci-msm.c                       | 48
>>>>>> ++++++++++++++++++++++
>>>>>>  2 files changed, 49 insertions(+)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>>> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>>> index 485483a..6a83b38 100644
>>>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>>>>>> @@ -17,6 +17,7 @@ Required properties:
>>>>>>         "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock)
>>>>>> (required)
>>>>>>         "core"  - SDC MMC clock (MCLK) (required)
>>>>>>         "bus"   - SDCC bus voter clock (optional)
>>>>>> +- clk-rates: Array of supported GCC clock frequencies for sdhc, Units
>>>>>> -
>>>>>> Hz.
>>>>>
>>>>>
>>>>>
>>>>> Why can't some combination of assigned-clock-rates and querying the
>>>>> clock provider for rates be used here?
>>>>
>>>>
>>>> From what I understood, assigned-clock-rates would only work for setting
>>>> some default clock rates for certain clocks by calling
>>>> of_clk_set_defaults.
>>>>
>>>> Whereas the requirement here is -
>>>> That since SDHC msm directly controls the clk(core clock) at source, it's
>>>> sdhci-msm driver needs to know the supported clk-rates by the underlying
>>>> platform to configure the nearest floor value supported on this platform
>>>> (when the request arrives from the core layer to switch the clock).
>>>
>>>
>>> Why does clk_round_rate not work for you? That will round down to the
>>> nearest frequency supported.
>>
>> clk_round_rate will round off to nearest supported "ceil" frequency.
>> But we require nearest rounded off "floor" frequency.
>
> Then fix the clk framework to do what you want. This doesn't need to be in DT.
Sure. Discussed with clk driver. Will make the required changes in qcom 
clk driver to fix this.

Will soon publish the new series.

>
> Rob
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 485483a..6a83b38 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -17,6 +17,7 @@  Required properties:
 	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
 	"core"	- SDC MMC clock (MCLK) (required)
 	"bus"	- SDCC bus voter clock (optional)
+- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
 
 Example:
 
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 85ddaae..042ecb2 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -81,6 +81,8 @@  struct sdhci_msm_host {
 	struct clk *clk;	/* main SD/MMC bus clock */
 	struct clk *pclk;	/* SDHC peripheral bus clock */
 	struct clk *bus_clk;	/* SDHC bus voter clock */
+	u32 *clk_table;
+	int clk_table_sz;
 	struct mmc_host *mmc;
 	bool use_14lpp_dll_reset;
 };
@@ -582,6 +584,50 @@  static const struct sdhci_pltfm_data sdhci_msm_pdata = {
 	.ops = &sdhci_msm_ops,
 };
 
+static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,
+				u32 **table, int *size)
+{
+	struct device_node *np = dev->of_node;
+	int count, ret;
+	u32 *arr;
+
+	count = of_property_count_elems_of_size(np, prop_name, sizeof(u32));
+	if (count < 0) {
+		dev_warn(dev, "%s: Invalid dt property, err(%d)\n",
+				prop_name, count);
+		return count;
+	}
+
+	arr = kcalloc(count, sizeof(*arr), GFP_KERNEL);
+	if (!arr)
+		return -ENOMEM;
+
+	ret = of_property_read_u32_array(np, prop_name, arr, count);
+	if (ret) {
+		kfree(arr);
+		dev_warn(dev, "%s Invalid dt array property, err(%d)\n",
+				prop_name, ret);
+		return ret;
+	}
+	*table = arr;
+	*size = count;
+	return 0;
+}
+
+void sdhci_msm_populate_dt(struct device *dev,
+						struct sdhci_msm_host *msm_host)
+{
+	int table_sz = 0;
+	u32 *table = NULL;
+
+	if (sdhci_msm_dt_get_array(dev, "clk-rates", &table, &table_sz)) {
+		dev_warn(dev, "failed in DT parsing for supported clk-rates\n");
+		return;
+	}
+	msm_host->clk_table = table;
+	msm_host->clk_table_sz = table_sz;
+}
+
 static int sdhci_msm_probe(struct platform_device *pdev)
 {
 	struct sdhci_host *host;
@@ -608,6 +654,8 @@  static int sdhci_msm_probe(struct platform_device *pdev)
 
 	sdhci_get_of_property(pdev);
 
+	sdhci_msm_populate_dt(&pdev->dev, msm_host);
+
 	/* Setup SDCC bus voter clock. */
 	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
 	if (!IS_ERR(msm_host->bus_clk)) {