| Message ID | 20161024035930.20274-1-icenowy@aosc.xyz (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Dne 24.10.2016 v 05:59 Icenowy Zheng napsal(a): > Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. > The code that poke some unknown bit of PMU for H3/A64 didn't check > the PHY, and will cause kernel oops when PHY 0 is used. > > Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) > > Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> > --- > drivers/phy/phy-sun4i-usb.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c > index b9342a2..ff8e9dd 100644 > --- a/drivers/phy/phy-sun4i-usb.c > +++ b/drivers/phy/phy-sun4i-usb.c > @@ -264,7 +264,7 @@ static int sun4i_usb_phy_init(struct phy *_phy) > return ret; > } > > - if (data->cfg->enable_pmu_unk1) { > + if (phy->index != 0 && data->cfg->enable_pmu_unk1) { It might be better to check for phy->pmu directly. regards, o. > val = readl(phy->pmu + REG_PMU_UNK1); > writel(val & ~2, phy->pmu + REG_PMU_UNK1); > } >
On Mon, Oct 24, 2016 at 11:59:30AM +0800, Icenowy Zheng wrote: > Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. > The code that poke some unknown bit of PMU for H3/A64 didn't check > the PHY, and will cause kernel oops when PHY 0 is used. > > Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) > > Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Cc'ing stable would be nice. Apart from that, Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Thanks! Maxime
> On Mon, Oct 24, 2016 at 11:59:30AM +0800, Icenowy Zheng wrote: > >> Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. >> The code that poke some unknown bit of PMU for H3/A64 didn't check >> the PHY, and will cause kernel oops when PHY 0 is used. >> >> Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> > > Cc'ing stable would be nice. Yes... As it's also used by H3... > > Apart from that, Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> If I change it to check whether phy->pmu is null, will you keep the ACK? > > Thanks! > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com
Hi, On Tue, Oct 25, 2016 at 11:32:44AM +0800, Icenowy Zheng wrote: > > > > On Mon, Oct 24, 2016 at 11:59:30AM +0800, Icenowy Zheng wrote: > > > >> Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. > >> The code that poke some unknown bit of PMU for H3/A64 didn't check > >> the PHY, and will cause kernel oops when PHY 0 is used. > >> > >> Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) > >> > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> > > > > Cc'ing stable would be nice. > > Yes... As it's also used by H3... > > > > > Apart from that, Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > If I change it to check whether phy->pmu is null, will you keep the ACK? Yep, thanks! Maxime
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c index b9342a2..ff8e9dd 100644 --- a/drivers/phy/phy-sun4i-usb.c +++ b/drivers/phy/phy-sun4i-usb.c @@ -264,7 +264,7 @@ static int sun4i_usb_phy_init(struct phy *_phy) return ret; } - if (data->cfg->enable_pmu_unk1) { + if (phy->index != 0 && data->cfg->enable_pmu_unk1) { val = readl(phy->pmu + REG_PMU_UNK1); writel(val & ~2, phy->pmu + REG_PMU_UNK1); }
Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. The code that poke some unknown bit of PMU for H3/A64 didn't check the PHY, and will cause kernel oops when PHY 0 is used. Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> --- drivers/phy/phy-sun4i-usb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)