Message ID | 5824763C020000780011DA56@prv-mh.provo.novell.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 10/11/16 12:29, Jan Beulich wrote: > When introducing support for these instructions, adjustment for the > alignment check logic (generating #GP(0)) was overlooked. > > Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
On Fri, Nov 11, 2016 at 03:36:13PM +0000, Andrew Cooper wrote: > On 10/11/16 12:29, Jan Beulich wrote: > > When introducing support for these instructions, adjustment for the > > alignment check logic (generating #GP(0)) was overlooked. > > > > Signed-off-by: Jan Beulich <jbeulich@suse.com> > > Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Applied.
--- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -4940,7 +4940,7 @@ x86_emulate( { uint32_t mxcsr = 0; - if ( vex.pfx != vex_66 ) + if ( ea.bytes < 16 || vex.pfx == vex_f3 ) mxcsr = MXCSR_MM; else if ( vcpu_has_misalignsse() ) asm ( "stmxcsr %0" : "=m" (mxcsr) );