diff mbox

[2/2] dmaengine: omap-dma: Support for slave devices with data port window

Message ID 20161025105019.24475-3-peter.ujfalusi@ti.com (mailing list archive)
State Changes Requested
Headers show

Commit Message

Peter Ujfalusi Oct. 25, 2016, 10:50 a.m. UTC
Based on the src/dst_port_window_size - if it is set - configure the DMA
channel to use double indexing in order to be able to loop within the
address window.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/dma/omap-dma.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 43 insertions(+), 2 deletions(-)

Comments

Vinod Koul Nov. 14, 2016, 4:35 a.m. UTC | #1
On Tue, Oct 25, 2016 at 01:50:19PM +0300, Peter Ujfalusi wrote:
> Based on the src/dst_port_window_size - if it is set - configure the DMA
> channel to use double indexing in order to be able to loop within the
> address window.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  drivers/dma/omap-dma.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 43 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
> index 025f499cb20d..29350f936154 100644
> --- a/drivers/dma/omap-dma.c
> +++ b/drivers/dma/omap-dma.c
> @@ -166,6 +166,9 @@ enum {
>  	CSDP_DST_BURST_16	= 1 << 14,
>  	CSDP_DST_BURST_32	= 2 << 14,
>  	CSDP_DST_BURST_64	= 3 << 14,
> +	CSDP_WRITE_NON_POSTED	= (0 << 16),

and that would be..?

> +	CSDP_WRITE_POSTED	= (1 << 16),
> +	CSDP_WRITE_LAST_NON_POSTED = (2 << 16),
>  
>  	CICR_TOUT_IE		= BIT(0),	/* OMAP1 only */
>  	CICR_DROP_IE		= BIT(1),
> @@ -883,15 +886,18 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  	unsigned i, es, en, frame_bytes;
>  	bool ll_failed = false;
>  	u32 burst;
> +	int32_t port_window;

not u32?

>  
>  	if (dir == DMA_DEV_TO_MEM) {
>  		dev_addr = c->cfg.src_addr;
>  		dev_width = c->cfg.src_addr_width;
>  		burst = c->cfg.src_maxburst;
> +		port_window = c->cfg.src_port_window_size;
>  	} else if (dir == DMA_MEM_TO_DEV) {
>  		dev_addr = c->cfg.dst_addr;
>  		dev_width = c->cfg.dst_addr_width;
>  		burst = c->cfg.dst_maxburst;
> +		port_window = c->cfg.dst_port_window_size;
>  	} else {
>  		dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
>  		return NULL;
> @@ -923,11 +929,39 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  
>  	d->ccr = c->ccr | CCR_SYNC_FRAME;
>  	if (dir == DMA_DEV_TO_MEM) {
> -		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
>  		d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
> +
> +		d->ccr |= CCR_DST_AMODE_POSTINC;
> +		if (port_window) {
> +			d->ccr |= CCR_SRC_AMODE_DBLIDX;
> +			d->ei = 1;
> +			d->fi = (-1) * (port_window - 1);
> +
> +			if (port_window / 64)
> +				d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
> +			else if (port_window / 32)
> +				d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
> +			else if (port_window / 16)
> +				d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;
> +		} else {
> +			d->ccr |= CCR_SRC_AMODE_CONSTANT;

okay does all your hw support this mode, should this not be checked to be
supported, perhpas a DT property which describes thsi capablity and then you
use it, if supported

> +		}
>  	} else {
> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
> +
> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
> +		if (port_window) {
> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
> +
> +			if (port_window / 64)
> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
> +			else if (port_window / 32)
> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
> +			else if (port_window / 16)
> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;

what does these mean?

> +		} else {
> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
> +		}
>  	}
>  
>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  			d->ccr |= CCR_TRIGGER_SRC;
>  
>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
> +
> +		if (port_window)
> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
>  	}
>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
>  		d->clnk_ctrl = c->dma_ch;
> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  		osg->addr = sg_dma_address(sgent);
>  		osg->en = en;
>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
> +		if (port_window && dir == DMA_MEM_TO_DEV) {
> +			osg->ei = 1;
> +			osg->fi = (-1) * (port_window - 1);
> +		}

can you describe what you are trying here..
Peter Ujfalusi Nov. 14, 2016, 9:44 a.m. UTC | #2
On 11/14/2016 06:35 AM, Vinod Koul wrote:
> On Tue, Oct 25, 2016 at 01:50:19PM +0300, Peter Ujfalusi wrote:
>> Based on the src/dst_port_window_size - if it is set - configure the DMA
>> channel to use double indexing in order to be able to loop within the
>> address window.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> ---
>>  drivers/dma/omap-dma.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
>>  1 file changed, 43 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
>> index 025f499cb20d..29350f936154 100644
>> --- a/drivers/dma/omap-dma.c
>> +++ b/drivers/dma/omap-dma.c
>> @@ -166,6 +166,9 @@ enum {
>>  	CSDP_DST_BURST_16	= 1 << 14,
>>  	CSDP_DST_BURST_32	= 2 << 14,
>>  	CSDP_DST_BURST_64	= 3 << 14,
>> +	CSDP_WRITE_NON_POSTED	= (0 << 16),
> 
> and that would be..?

0, but I like to have a define for this as we might need to use this mode in
the future and the bit field is defined like this.

> 
>> +	CSDP_WRITE_POSTED	= (1 << 16),
>> +	CSDP_WRITE_LAST_NON_POSTED = (2 << 16),
>>  
>>  	CICR_TOUT_IE		= BIT(0),	/* OMAP1 only */
>>  	CICR_DROP_IE		= BIT(1),
>> @@ -883,15 +886,18 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>  	unsigned i, es, en, frame_bytes;
>>  	bool ll_failed = false;
>>  	u32 burst;
>> +	int32_t port_window;
> 
> not u32?

Yeah, it can be u32.

> 
>>  
>>  	if (dir == DMA_DEV_TO_MEM) {
>>  		dev_addr = c->cfg.src_addr;
>>  		dev_width = c->cfg.src_addr_width;
>>  		burst = c->cfg.src_maxburst;
>> +		port_window = c->cfg.src_port_window_size;
>>  	} else if (dir == DMA_MEM_TO_DEV) {
>>  		dev_addr = c->cfg.dst_addr;
>>  		dev_width = c->cfg.dst_addr_width;
>>  		burst = c->cfg.dst_maxburst;
>> +		port_window = c->cfg.dst_port_window_size;
>>  	} else {
>>  		dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
>>  		return NULL;
>> @@ -923,11 +929,39 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>  
>>  	d->ccr = c->ccr | CCR_SYNC_FRAME;
>>  	if (dir == DMA_DEV_TO_MEM) {
>> -		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
>>  		d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
>> +
>> +		d->ccr |= CCR_DST_AMODE_POSTINC;
>> +		if (port_window) {
>> +			d->ccr |= CCR_SRC_AMODE_DBLIDX;
>> +			d->ei = 1;
>> +			d->fi = (-1) * (port_window - 1);
>> +
>> +			if (port_window / 64)
>> +				d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
>> +			else if (port_window / 32)
>> +				d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
>> +			else if (port_window / 16)
>> +				d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;
>> +		} else {
>> +			d->ccr |= CCR_SRC_AMODE_CONSTANT;
> 
> okay does all your hw support this mode, should this not be checked to be
> supported, perhpas a DT property which describes thsi capablity and then you
> use it, if supported

yes, burst and packed mode is supported by all sDMA versions.

> 
>> +		}
>>  	} else {
>> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
>>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
>> +
>> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
>> +		if (port_window) {
>> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
>> +
>> +			if (port_window / 64)
>> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
>> +			else if (port_window / 32)
>> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
>> +			else if (port_window / 16)
>> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
> 
> what does these mean?

To optimize the speed on the write side. First check if the window size is
multiple of 64 bytes, we enable the 64byte burst and packed transfer, if not
try the 32bytes, then 16bytes.
Same for the opposite direction previously.

> 
>> +		} else {
>> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
>> +		}
>>  	}
>>  
>>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
>> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>  			d->ccr |= CCR_TRIGGER_SRC;
>>  
>>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
>> +
>> +		if (port_window)
>> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
>>  	}
>>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
>>  		d->clnk_ctrl = c->dma_ch;
>> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>  		osg->addr = sg_dma_address(sgent);
>>  		osg->en = en;
>>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
>> +		if (port_window && dir == DMA_MEM_TO_DEV) {
>> +			osg->ei = 1;
>> +			osg->fi = (-1) * (port_window - 1);
>> +		}
> 
> can you describe what you are trying here..

The DMA is set up so one frame covers the port window. When the frame is
finished we need to start reading the next frame from the start of the window
again. The FI as (-1) * (port_window - 1) will take us to the start of the
window. When the frame is finished the DMA is pointing to the last byte of the
window.

>
Russell King (Oracle) Nov. 14, 2016, 10:53 a.m. UTC | #3
On Tue, Oct 25, 2016 at 01:50:19PM +0300, Peter Ujfalusi wrote:
> Based on the src/dst_port_window_size - if it is set - configure the DMA
> channel to use double indexing in order to be able to loop within the
> address window.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  drivers/dma/omap-dma.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 43 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
> index 025f499cb20d..29350f936154 100644
> --- a/drivers/dma/omap-dma.c
> +++ b/drivers/dma/omap-dma.c
> @@ -166,6 +166,9 @@ enum {
>  	CSDP_DST_BURST_16	= 1 << 14,
>  	CSDP_DST_BURST_32	= 2 << 14,
>  	CSDP_DST_BURST_64	= 3 << 14,
> +	CSDP_WRITE_NON_POSTED	= (0 << 16),
> +	CSDP_WRITE_POSTED	= (1 << 16),
> +	CSDP_WRITE_LAST_NON_POSTED = (2 << 16),

Why the useless parens?

> +		if (port_window) {
> +			d->ccr |= CCR_SRC_AMODE_DBLIDX;
> +			d->ei = 1;
> +			d->fi = (-1) * (port_window - 1);

You know that's 1 - port_window, or -(port_window - 1).

> +
> +			if (port_window / 64)
> +				d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
> +			else if (port_window / 32)
> +				d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
> +			else if (port_window / 16)
> +				d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;

Why these divisions?  Wouldn't >= be more suitable here?  Do they even
make sense here?

> +		} else {
> +			d->ccr |= CCR_SRC_AMODE_CONSTANT;
> +		}
>  	} else {
> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
> +
> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
> +		if (port_window) {
> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
> +
> +			if (port_window / 64)
> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
> +			else if (port_window / 32)
> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
> +			else if (port_window / 16)
> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;

Ditto.

> +		} else {
> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
> +		}
>  	}
>  
>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  			d->ccr |= CCR_TRIGGER_SRC;
>  
>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
> +
> +		if (port_window)
> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
>  	}
>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
>  		d->clnk_ctrl = c->dma_ch;
> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>  		osg->addr = sg_dma_address(sgent);
>  		osg->en = en;
>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
> +		if (port_window && dir == DMA_MEM_TO_DEV) {
> +			osg->ei = 1;
> +			osg->fi = (-1) * (port_window - 1);

Same as above.
Vinod Koul Nov. 14, 2016, 10:55 a.m. UTC | #4
On Mon, Nov 14, 2016 at 11:44:33AM +0200, Peter Ujfalusi wrote:
> On 11/14/2016 06:35 AM, Vinod Koul wrote:

> >>  	} else {
> >> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
> >>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
> >> +
> >> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
> >> +		if (port_window) {
> >> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
> >> +
> >> +			if (port_window / 64)
> >> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
> >> +			else if (port_window / 32)
> >> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
> >> +			else if (port_window / 16)
> >> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
> > 
> > what does these mean?
> 
> To optimize the speed on the write side. First check if the window size is
> multiple of 64 bytes, we enable the 64byte burst and packed transfer, if not
> try the 32bytes, then 16bytes.
> Same for the opposite direction previously.

Ah and how does client know the size of window..?

> 
> > 
> >> +		} else {
> >> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
> >> +		}
> >>  	}
> >>  
> >>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
> >> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
> >>  			d->ccr |= CCR_TRIGGER_SRC;
> >>  
> >>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
> >> +
> >> +		if (port_window)
> >> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
> >>  	}
> >>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
> >>  		d->clnk_ctrl = c->dma_ch;
> >> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
> >>  		osg->addr = sg_dma_address(sgent);
> >>  		osg->en = en;
> >>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
> >> +		if (port_window && dir == DMA_MEM_TO_DEV) {
> >> +			osg->ei = 1;
> >> +			osg->fi = (-1) * (port_window - 1);
> >> +		}
> > 
> > can you describe what you are trying here..
> 
> The DMA is set up so one frame covers the port window. When the frame is
> finished we need to start reading the next frame from the start of the window
> again. The FI as (-1) * (port_window - 1) will take us to the start of the
> window. When the frame is finished the DMA is pointing to the last byte of the
> window.

Sound right to me, would help to add this as a comment..
Peter Ujfalusi Nov. 14, 2016, 11:49 a.m. UTC | #5
On 11/14/2016 12:55 PM, Vinod Koul wrote:
> On Mon, Nov 14, 2016 at 11:44:33AM +0200, Peter Ujfalusi wrote:
>> On 11/14/2016 06:35 AM, Vinod Koul wrote:
> 
>>>>  	} else {
>>>> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
>>>>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
>>>> +
>>>> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
>>>> +		if (port_window) {
>>>> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
>>>> +
>>>> +			if (port_window / 64)
>>>> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
>>>> +			else if (port_window / 32)
>>>> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
>>>> +			else if (port_window / 16)
>>>> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
>>>
>>> what does these mean?
>>
>> To optimize the speed on the write side. First check if the window size is
>> multiple of 64 bytes, we enable the 64byte burst and packed transfer, if not
>> try the 32bytes, then 16bytes.
>> Same for the opposite direction previously.
> 
> Ah and how does client know the size of window..?

Clients configuring the DMA should know what they are configuring for. If the
window size can be different they might have DT property if they need.

> 
>>
>>>
>>>> +		} else {
>>>> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
>>>> +		}
>>>>  	}
>>>>  
>>>>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
>>>> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>>>  			d->ccr |= CCR_TRIGGER_SRC;
>>>>  
>>>>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
>>>> +
>>>> +		if (port_window)
>>>> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
>>>>  	}
>>>>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
>>>>  		d->clnk_ctrl = c->dma_ch;
>>>> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
>>>>  		osg->addr = sg_dma_address(sgent);
>>>>  		osg->en = en;
>>>>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
>>>> +		if (port_window && dir == DMA_MEM_TO_DEV) {
>>>> +			osg->ei = 1;
>>>> +			osg->fi = (-1) * (port_window - 1);
>>>> +		}
>>>
>>> can you describe what you are trying here..
>>
>> The DMA is set up so one frame covers the port window. When the frame is
>> finished we need to start reading the next frame from the start of the window
>> again. The FI as (-1) * (port_window - 1) will take us to the start of the
>> window. When the frame is finished the DMA is pointing to the last byte of the
>> window.
> 
> Sound right to me, would help to add this as a comment..

OK, I will add a comment describing it.

>
Peter Ujfalusi Nov. 14, 2016, 11:56 a.m. UTC | #6
On 11/14/2016 12:53 PM, Russell King - ARM Linux wrote:
> On Tue, Oct 25, 2016 at 01:50:19PM +0300, Peter Ujfalusi wrote:
>> Based on the src/dst_port_window_size - if it is set - configure the DMA
>> channel to use double indexing in order to be able to loop within the
>> address window.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> ---
>>  drivers/dma/omap-dma.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
>>  1 file changed, 43 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
>> index 025f499cb20d..29350f936154 100644
>> --- a/drivers/dma/omap-dma.c
>> +++ b/drivers/dma/omap-dma.c
>> @@ -166,6 +166,9 @@ enum {
>>  	CSDP_DST_BURST_16	= 1 << 14,
>>  	CSDP_DST_BURST_32	= 2 << 14,
>>  	CSDP_DST_BURST_64	= 3 << 14,
>> +	CSDP_WRITE_NON_POSTED	= (0 << 16),
>> +	CSDP_WRITE_POSTED	= (1 << 16),
>> +	CSDP_WRITE_LAST_NON_POSTED = (2 << 16),
>
> Why the useless parens?

I will get rid of them.

>
>> +		if (port_window) {
>> +			d->ccr |= CCR_SRC_AMODE_DBLIDX;
>> +			d->ei = 1;
>> +			d->fi = (-1) * (port_window - 1);
>
> You know that's 1 - port_window, or -(port_window - 1).

Yes, I know. "-(port_window - 1)" might be a bit better.

>
>> +
>> +			if (port_window / 64)
>> +				d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
>> +			else if (port_window / 32)
>> +				d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
>> +			else if (port_window / 16)
>> +				d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;
>
> Why these divisions?  Wouldn't >= be more suitable here?  Do they even
> make sense here?

I'll revisit these.

>
>> +		} else {
>> +			d->ccr |= CCR_SRC_AMODE_CONSTANT;
>> +		}
>>  	} else {
>> -		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
>>  		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
>> +
>> +		d->ccr |= CCR_SRC_AMODE_POSTINC;
>> +		if (port_window) {
>> +			d->ccr |= CCR_DST_AMODE_DBLIDX;
>> +
>> +			if (port_window / 64)
>> +				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
>> +			else if (port_window / 32)
>> +				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
>> +			else if (port_window / 16)
>> +				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
>
> Ditto.
>
>> +		} else {
>> +			d->ccr |= CCR_DST_AMODE_CONSTANT;
>> +		}
>>  	}
>>
>>  	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
>> @@ -945,6 +979,9 @@ static struct dma_async_tx_descriptor
*omap_dma_prep_slave_sg(
>>  			d->ccr |= CCR_TRIGGER_SRC;
>>
>>  		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
>> +
>> +		if (port_window)
>> +			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
>>  	}
>>  	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
>>  		d->clnk_ctrl = c->dma_ch;
>> @@ -970,6 +1007,10 @@ static struct dma_async_tx_descriptor
*omap_dma_prep_slave_sg(
>>  		osg->addr = sg_dma_address(sgent);
>>  		osg->en = en;
>>  		osg->fn = sg_dma_len(sgent) / frame_bytes;
>> +		if (port_window && dir == DMA_MEM_TO_DEV) {
>> +			osg->ei = 1;
>> +			osg->fi = (-1) * (port_window - 1);
>
> Same as above.
>
diff mbox

Patch

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 025f499cb20d..29350f936154 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -166,6 +166,9 @@  enum {
 	CSDP_DST_BURST_16	= 1 << 14,
 	CSDP_DST_BURST_32	= 2 << 14,
 	CSDP_DST_BURST_64	= 3 << 14,
+	CSDP_WRITE_NON_POSTED	= (0 << 16),
+	CSDP_WRITE_POSTED	= (1 << 16),
+	CSDP_WRITE_LAST_NON_POSTED = (2 << 16),
 
 	CICR_TOUT_IE		= BIT(0),	/* OMAP1 only */
 	CICR_DROP_IE		= BIT(1),
@@ -883,15 +886,18 @@  static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
 	unsigned i, es, en, frame_bytes;
 	bool ll_failed = false;
 	u32 burst;
+	int32_t port_window;
 
 	if (dir == DMA_DEV_TO_MEM) {
 		dev_addr = c->cfg.src_addr;
 		dev_width = c->cfg.src_addr_width;
 		burst = c->cfg.src_maxburst;
+		port_window = c->cfg.src_port_window_size;
 	} else if (dir == DMA_MEM_TO_DEV) {
 		dev_addr = c->cfg.dst_addr;
 		dev_width = c->cfg.dst_addr_width;
 		burst = c->cfg.dst_maxburst;
+		port_window = c->cfg.dst_port_window_size;
 	} else {
 		dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
 		return NULL;
@@ -923,11 +929,39 @@  static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
 
 	d->ccr = c->ccr | CCR_SYNC_FRAME;
 	if (dir == DMA_DEV_TO_MEM) {
-		d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
 		d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
+
+		d->ccr |= CCR_DST_AMODE_POSTINC;
+		if (port_window) {
+			d->ccr |= CCR_SRC_AMODE_DBLIDX;
+			d->ei = 1;
+			d->fi = (-1) * (port_window - 1);
+
+			if (port_window / 64)
+				d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
+			else if (port_window / 32)
+				d->csdp = CSDP_SRC_BURST_32 | CSDP_SRC_PACKED;
+			else if (port_window / 16)
+				d->csdp = CSDP_SRC_BURST_16 | CSDP_SRC_PACKED;
+		} else {
+			d->ccr |= CCR_SRC_AMODE_CONSTANT;
+		}
 	} else {
-		d->ccr |= CCR_DST_AMODE_CONSTANT | CCR_SRC_AMODE_POSTINC;
 		d->csdp = CSDP_SRC_BURST_64 | CSDP_SRC_PACKED;
+
+		d->ccr |= CCR_SRC_AMODE_POSTINC;
+		if (port_window) {
+			d->ccr |= CCR_DST_AMODE_DBLIDX;
+
+			if (port_window / 64)
+				d->csdp = CSDP_DST_BURST_64 | CSDP_DST_PACKED;
+			else if (port_window / 32)
+				d->csdp = CSDP_DST_BURST_32 | CSDP_DST_PACKED;
+			else if (port_window / 16)
+				d->csdp = CSDP_DST_BURST_16 | CSDP_DST_PACKED;
+		} else {
+			d->ccr |= CCR_DST_AMODE_CONSTANT;
+		}
 	}
 
 	d->cicr = CICR_DROP_IE | CICR_BLOCK_IE;
@@ -945,6 +979,9 @@  static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
 			d->ccr |= CCR_TRIGGER_SRC;
 
 		d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
+
+		if (port_window)
+			d->csdp |= CSDP_WRITE_LAST_NON_POSTED;
 	}
 	if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
 		d->clnk_ctrl = c->dma_ch;
@@ -970,6 +1007,10 @@  static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
 		osg->addr = sg_dma_address(sgent);
 		osg->en = en;
 		osg->fn = sg_dma_len(sgent) / frame_bytes;
+		if (port_window && dir == DMA_MEM_TO_DEV) {
+			osg->ei = 1;
+			osg->fi = (-1) * (port_window - 1);
+		}
 
 		if (d->using_ll) {
 			osg->t2_desc = dma_pool_alloc(od->desc_pool, GFP_ATOMIC,