| Message ID | 1479372648-11242-1-git-send-email-m.szyprowski@samsung.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
(Adding linux-clk@vger.kernel.org at Cc) On 11/17/2016 09:50 AM, Marek Szyprowski wrote: > The proper parent clock for FSYS block is "aclk_fsys_200" according to > the Exynos5433 reference manual. Applied both patches to my tree, thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Marek, 2016-11-17 17:50 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>: > The proper parent clock for FSYS block is "aclk_fsys_200" according to > the Exynos5433 reference manual. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++--- > drivers/clk/samsung/clk-exynos5433.c | 2 +- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > index 63379b04e052..ffff67a0e9cd 100644 > --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > @@ -79,7 +79,7 @@ Required Properties: > Input clocks for fsys clock controller: > - oscclk > - sclk_ufs_mphy > - - div_aclk_fsys_200 > + - aclk_fsys_200 > - sclk_pcie_100_fsys > - sclk_ufsunipro_fsys > - sclk_mmc2_fsys > @@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below. > > clock-names = "oscclk", > "sclk_ufs_mphy", > - "div_aclk_fsys_200", > + "aclk_fsys_200", > "sclk_pcie_100_fsys", > "sclk_ufsunipro_fsys", > "sclk_mmc2_fsys", > @@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below. > "sclk_usbdrd30_fsys"; > clocks = <&xxti>, > <&cmu_cpif CLK_SCLK_UFS_MPHY>, > - <&cmu_top CLK_DIV_ACLK_FSYS_200>, > + <&cmu_top CLK_ACLK_FSYS_200>, > <&cmu_top CLK_SCLK_PCIE_100_FSYS>, > <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, > <&cmu_top CLK_SCLK_MMC2_FSYS>, > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index cdf6ba3e5577..218a94f90e37 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np) > > /* list of all parent clock list */ > PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", }; > -PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", }; > +PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", }; > PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",}; > PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",}; > PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", }; Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 63379b04e052..ffff67a0e9cd 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -79,7 +79,7 @@ Required Properties: Input clocks for fsys clock controller: - oscclk - sclk_ufs_mphy - - div_aclk_fsys_200 + - aclk_fsys_200 - sclk_pcie_100_fsys - sclk_ufsunipro_fsys - sclk_mmc2_fsys @@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below. clock-names = "oscclk", "sclk_ufs_mphy", - "div_aclk_fsys_200", + "aclk_fsys_200", "sclk_pcie_100_fsys", "sclk_ufsunipro_fsys", "sclk_mmc2_fsys", @@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below. "sclk_usbdrd30_fsys"; clocks = <&xxti>, <&cmu_cpif CLK_SCLK_UFS_MPHY>, - <&cmu_top CLK_DIV_ACLK_FSYS_200>, + <&cmu_top CLK_ACLK_FSYS_200>, <&cmu_top CLK_SCLK_PCIE_100_FSYS>, <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, <&cmu_top CLK_SCLK_MMC2_FSYS>, diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index cdf6ba3e5577..218a94f90e37 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np) /* list of all parent clock list */ PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", }; -PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", }; +PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", }; PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",}; PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",}; PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
The proper parent clock for FSYS block is "aclk_fsys_200" according to the Exynos5433 reference manual. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++--- drivers/clk/samsung/clk-exynos5433.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)