diff mbox

[21/37] drm/i915: Populate fb->format early for inherited fbs

Message ID 1479498793-31021-22-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Nov. 18, 2016, 7:52 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make sure the framebuffer format info is available as early as possible
for fbs we inherit from the BIOS. This will allow us to use the fb as
if it was fully formed before we register it.

Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Daniel Vetter Nov. 30, 2016, 3:42 p.m. UTC | #1 
On Fri, Nov 18, 2016 at 09:52:57PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Make sure the framebuffer format info is available as early as possible
> for fbs we inherit from the BIOS. This will allow us to use the fb as
> if it was fully formed before we register it.
> 
> Cc: intel-gfx@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 74a638c8de61..c45da6766fff 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8717,6 +8717,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
>  	fourcc = i9xx_format_to_fourcc(pixel_format);
>  	fb->pixel_format = fourcc;
>  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> +	fb->format = drm_format_info(fourcc);
>  
>  	if (INTEL_GEN(dev_priv) >= 4) {
>  		if (plane_config->tiling)
> @@ -9748,6 +9749,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
>  				      val & PLANE_CTL_ALPHA_MASK);
>  	fb->pixel_format = fourcc;
>  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> +	fb->format = drm_format_info(fourcc);
>  
>  	tiling = val & PLANE_CTL_TILED_MASK;
>  	switch (tiling) {
> @@ -9863,6 +9865,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
>  	fourcc = i9xx_format_to_fourcc(pixel_format);
>  	fb->pixel_format = fourcc;
>  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> +	fb->format = drm_format_info(fourcc);

Do we really want to hand-roll this all, or could we somehow reuse
fill_fb_struct? Or will this all go away again?

I'll reserve judgement until the end, but this here looks correct ;-)

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

>  
>  	base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
>  	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> -- 
> 2.7.4
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Ville Syrjälä Nov. 30, 2016, 3:57 p.m. UTC | #2 
On Wed, Nov 30, 2016 at 04:42:23PM +0100, Daniel Vetter wrote:
> On Fri, Nov 18, 2016 at 09:52:57PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Make sure the framebuffer format info is available as early as possible
> > for fbs we inherit from the BIOS. This will allow us to use the fb as
> > if it was fully formed before we register it.
> > 
> > Cc: intel-gfx@lists.freedesktop.org
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 74a638c8de61..c45da6766fff 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -8717,6 +8717,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
> >  	fourcc = i9xx_format_to_fourcc(pixel_format);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> >  
> >  	if (INTEL_GEN(dev_priv) >= 4) {
> >  		if (plane_config->tiling)
> > @@ -9748,6 +9749,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
> >  				      val & PLANE_CTL_ALPHA_MASK);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> >  
> >  	tiling = val & PLANE_CTL_TILED_MASK;
> >  	switch (tiling) {
> > @@ -9863,6 +9865,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
> >  	fourcc = i9xx_format_to_fourcc(pixel_format);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> 
> Do we really want to hand-roll this all, or could we somehow reuse
> fill_fb_struct? Or will this all go away again?

Yeah, I think we'll want to flip all of this over to using
fill_fb_struct(). Just didn't have the energy to look into that yet,
and the series was already getting too long anyway. So figured I'd save
that for the next round.

> 
> I'll reserve judgement until the end, but this here looks correct ;-)
> 
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> >  
> >  	base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
> >  	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > -- 
> > 2.7.4
> > 
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
Daniel Vetter Nov. 30, 2016, 4:09 p.m. UTC | #3 
On Wed, Nov 30, 2016 at 04:42:23PM +0100, Daniel Vetter wrote:
> On Fri, Nov 18, 2016 at 09:52:57PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Make sure the framebuffer format info is available as early as possible
> > for fbs we inherit from the BIOS. This will allow us to use the fb as
> > if it was fully formed before we register it.
> > 
> > Cc: intel-gfx@lists.freedesktop.org
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 74a638c8de61..c45da6766fff 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -8717,6 +8717,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
> >  	fourcc = i9xx_format_to_fourcc(pixel_format);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> >  
> >  	if (INTEL_GEN(dev_priv) >= 4) {
> >  		if (plane_config->tiling)
> > @@ -9748,6 +9749,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
> >  				      val & PLANE_CTL_ALPHA_MASK);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> >  
> >  	tiling = val & PLANE_CTL_TILED_MASK;
> >  	switch (tiling) {
> > @@ -9863,6 +9865,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
> >  	fourcc = i9xx_format_to_fourcc(pixel_format);
> >  	fb->pixel_format = fourcc;
> >  	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
> > +	fb->format = drm_format_info(fourcc);
> 
> Do we really want to hand-roll this all, or could we somehow reuse
> fill_fb_struct? Or will this all go away again?

Looking at the end result I think doing the fill_fb_struct a pile earlier
would be nice. Or at least extract an set_fb_format helper or whatever to
set ->format and ->dev.

Needs a better name than set_fb_format though ;-)

Anyway, follow-up work.
-Daniel

> 
> I'll reserve judgement until the end, but this here looks correct ;-)
> 
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> >  
> >  	base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
> >  	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> > -- 
> > 2.7.4
> > 
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 74a638c8de61..c45da6766fff 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8717,6 +8717,7 @@  i9xx_get_initial_plane_config(struct intel_crtc *crtc,
 	fourcc = i9xx_format_to_fourcc(pixel_format);
 	fb->pixel_format = fourcc;
 	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
+	fb->format = drm_format_info(fourcc);
 
 	if (INTEL_GEN(dev_priv) >= 4) {
 		if (plane_config->tiling)
@@ -9748,6 +9749,7 @@  skylake_get_initial_plane_config(struct intel_crtc *crtc,
 				      val & PLANE_CTL_ALPHA_MASK);
 	fb->pixel_format = fourcc;
 	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
+	fb->format = drm_format_info(fourcc);
 
 	tiling = val & PLANE_CTL_TILED_MASK;
 	switch (tiling) {
@@ -9863,6 +9865,7 @@  ironlake_get_initial_plane_config(struct intel_crtc *crtc,
 	fourcc = i9xx_format_to_fourcc(pixel_format);
 	fb->pixel_format = fourcc;
 	fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
+	fb->format = drm_format_info(fourcc);
 
 	base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {