diff mbox

[07/13] target-ppc: implement xxextractuw instruction

Message ID 1480937130-24561-8-git-send-email-nikunj@linux.vnet.ibm.com (mailing list archive)
State New, archived
Headers show

Commit Message

Nikunj A. Dadhania Dec. 5, 2016, 11:25 a.m. UTC 
xxextractuw: VSX Vector Extract Unsigned Word

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target-ppc/helper.h                 |  1 +
 target-ppc/int_helper.c             | 33 +++++++++++++++++++++++++++++++++
 target-ppc/translate/vsx-impl.inc.c | 22 ++++++++++++++++++++++
 target-ppc/translate/vsx-ops.inc.c  |  5 +++++
 4 files changed, 61 insertions(+)

Comments

Richard Henderson Dec. 5, 2016, 6:10 p.m. UTC | #1 
On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote:
> +static void gen_##name(DisasContext *ctx)                       \
> +{                                                               \
> +    TCGv xt, xb;                                                \
> +    TCGv_i32 t0 = tcg_temp_new_i32();                           \
> +    uint8_t uimm = UIMM4(ctx->opcode);                          \
> +                                                                \
> +    if (unlikely(!ctx->vsx_enabled)) {                          \
> +        gen_exception(ctx, POWERPC_EXCP_VSXU);                  \
> +        return;                                                 \
> +    }                                                           \
> +    xt = tcg_const_tl(xT(ctx->opcode));                         \
> +    xb = tcg_const_tl(xB(ctx->opcode));                         \
> +    tcg_gen_movi_i32(t0, uimm);                                 \
> +    gen_helper_##name(cpu_env, xt, xb, t0);                     \
> +    tcg_temp_free(xb);                                          \
> +    tcg_temp_free(xt);                                          \
> +    tcg_temp_free_i32(t0);                                      \

While the ISA manual says that the results are undefined if UIMM > 12, I don't
think you should allow the implementation here to read beyond the end of the XB
register.

What does real hardware do?  I would have hoped for a SIGILL, but I don't
suppose that actually happens.

> +    getVSR(xbn, &xb, env);                                              \
> +    memmove(&xt.u8[8 - es], &xb.u8[index], es);                         \
> +    memset(&xt.u8[8], 0, 8);                                            \
> +    memset(&xt.u8[0], 0, 8 - es);                                       \
> +    putVSR(xtn, &xt, env);                                              \

I think this would be simpler as

  memset(&xt, 0, sizeof(xt));
  memcpy(&xt.u8[8 - es], &xb.u8[index], es);

since xt and xb are local variables and therefore cannot overlap.


r~
diff mbox

Patch

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 91bdfc3..940f81c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -536,6 +536,7 @@  DEF_HELPER_2(xvrspic, void, env, i32)
 DEF_HELPER_2(xvrspim, void, env, i32)
 DEF_HELPER_2(xvrspip, void, env, i32)
 DEF_HELPER_2(xvrspiz, void, env, i32)
+DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32)
 
 DEF_HELPER_2(efscfsi, i32, env, i32)
 DEF_HELPER_2(efscfui, i32, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 7030f61..d7f50bd 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2033,6 +2033,39 @@  VEXTRACT(uw, u32)
 VEXTRACT(d, u64)
 #undef VEXTRACT
 
+#if defined(HOST_WORDS_BIGENDIAN)
+#define XXEXTRACT(name, element)                                        \
+void helper_##name(CPUPPCState *env, target_ulong xtn,                  \
+                   target_ulong xbn, uint32_t index)                    \
+{                                                                       \
+    ppc_vsr_t xt, xb;                                                   \
+    uint32_t es = sizeof(xt.element[0]);                                \
+                                                                        \
+    getVSR(xbn, &xb, env);                                              \
+    memmove(&xt.u8[8 - es], &xb.u8[index], es);                         \
+    memset(&xt.u8[8], 0, 8);                                            \
+    memset(&xt.u8[0], 0, 8 - es);                                       \
+    putVSR(xtn, &xt, env);                                              \
+}
+#else
+#define XXEXTRACT(name, element)                                        \
+void helper_##name(CPUPPCState *env, target_ulong xtn,                  \
+                   target_ulong xbn, uint32_t index)                    \
+{                                                                       \
+    ppc_vsr_t xt, xb;                                                   \
+    uint32_t es = sizeof(xt.element[0]);                                \
+    uint32_t s = (16 - index) - es;                                     \
+                                                                        \
+    getVSR(xbn, &xb, env);                                              \
+    memmove(&xt.u8[8], &xb.u8[s], es);                                  \
+    memset(&xt.u8[0], 0, 8);                                            \
+    memset(&xt.u8[8 + es], 0, 8 - es);                                  \
+    putVSR(xtn, &xt, env);                                              \
+}
+#endif
+XXEXTRACT(xxextractuw, u32)
+#undef XXEXTRACT
+
 #define VEXT_SIGNED(name, element, mask, cast, recast)              \
 void helper_##name(ppc_avr_t *r, ppc_avr_t *b)                      \
 {                                                                   \
diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
index d2d931c..e978b7e 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -1127,6 +1127,28 @@  static void gen_xxsldwi(DisasContext *ctx)
     tcg_temp_free_i64(xtl);
 }
 
+#define VSX_EXTRACT(name)                                       \
+static void gen_##name(DisasContext *ctx)                       \
+{                                                               \
+    TCGv xt, xb;                                                \
+    TCGv_i32 t0 = tcg_temp_new_i32();                           \
+    uint8_t uimm = UIMM4(ctx->opcode);                          \
+                                                                \
+    if (unlikely(!ctx->vsx_enabled)) {                          \
+        gen_exception(ctx, POWERPC_EXCP_VSXU);                  \
+        return;                                                 \
+    }                                                           \
+    xt = tcg_const_tl(xT(ctx->opcode));                         \
+    xb = tcg_const_tl(xB(ctx->opcode));                         \
+    tcg_gen_movi_i32(t0, uimm);                                 \
+    gen_helper_##name(cpu_env, xt, xb, t0);                     \
+    tcg_temp_free(xb);                                          \
+    tcg_temp_free(xt);                                          \
+    tcg_temp_free_i32(t0);                                      \
+}
+
+VSX_EXTRACT(xxextractuw)
+
 #undef GEN_XX2FORM
 #undef GEN_XX3FORM
 #undef GEN_XX2IFORM
diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
index f315580..1f35365 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -45,6 +45,10 @@  GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
 GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
 GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
 
+#define GEN_XX2FORM_EXT(name, opc2, opc3, fl2)                          \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0x00100000, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0x00100000, PPC_NONE, fl2)
+
 #define GEN_XX2FORM_EO(name, opc2, opc3, opc4, fl2)                          \
 GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 0, opc3, opc4, 0, PPC_NONE, fl2), \
 GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 1, opc3, opc4, 0, PPC_NONE, fl2)
@@ -267,6 +271,7 @@  GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),
 GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),
 GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300),
 GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),
+GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300),
 
 #define GEN_XXSEL_ROW(opc3) \
 GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \