diff mbox

[4/5] drm/i915/guc: Extract param logic form guc_init

Message ID 20161215154708.31521-5-arkadiusz.hiler@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Arkadiusz Hiler Dec. 15, 2016, 3:47 p.m. UTC
Let intel_guc_init() focus on determining and fetching the correct
firmware.

This patch introduces intel_sanitize_uc_params() that is called from
intel_uc_init().

Then, if we have GuC, we can call intel_guc_init() conditionally and we
do not have to do internal checks.

It can be easily extended to support HuC case as well.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Jeff McGee <jeff.mcgee@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 19 +------------------
 drivers/gpu/drm/i915/intel_uc.c         | 23 ++++++++++++++++++++++-
 2 files changed, 23 insertions(+), 19 deletions(-)

Comments

Daniele Ceraolo Spurio Dec. 23, 2016, 9:19 p.m. UTC | #1
On 15/12/16 07:47, Arkadiusz Hiler wrote:
> Let intel_guc_init() focus on determining and fetching the correct
> firmware.
>
> This patch introduces intel_sanitize_uc_params() that is called from
> intel_uc_init().
>
> Then, if we have GuC, we can call intel_guc_init() conditionally and we
> do not have to do internal checks.
>
> It can be easily extended to support HuC case as well.
>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Jeff McGee <jeff.mcgee@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 19 +------------------
>  drivers/gpu/drm/i915/intel_uc.c         | 23 ++++++++++++++++++++++-
>  2 files changed, 23 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index b76b556..0bb5fd1 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -617,7 +617,7 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
>  }
>
>  /**
> - * intel_guc_init() - define parameters and fetch firmware
> + * intel_guc_init() - determine and fetch firmware
>   * @dev_priv:	i915 device private
>   *
>   * Called early during driver load, but after GEM is initialised.
> @@ -630,17 +630,6 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
>  	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
>  	const char *fw_path;
>
> -	if (!HAS_GUC(dev_priv)) {
> -		i915.enable_guc_loading = 0;
> -		i915.enable_guc_submission = 0;
> -	} else {
> -		/* A negative value means "use platform default" */
> -		if (i915.enable_guc_loading < 0)
> -			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> -		if (i915.enable_guc_submission < 0)
> -			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> -	}
> -
>  	if (!HAS_GUC_UCODE(dev_priv)) {
>  		fw_path = NULL;
>  	} else if (IS_SKYLAKE(dev_priv)) {
> @@ -663,13 +652,7 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
>  	guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
>  	guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
>
> -	/* can't enable guc submission without guc */
> -	if (!i915.enable_guc_loading)
> -		i915.enable_guc_submission = 0;
> -
>  	/* Early (and silent) return if GuC loading is disabled */
> -	if (!i915.enable_guc_loading)
> -		return;
>  	if (fw_path == NULL)
>  		return;
>  	if (*fw_path == '\0')
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 4e184edb..e72f784 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -25,6 +25,24 @@
>  #include "i915_drv.h"
>  #include "intel_uc.h"
>
> +static void intel_sanitize_uc_params(struct drm_i915_private *dev_priv)
> +{
> +	if (!HAS_GUC(dev_priv)) {
> +		i915.enable_guc_loading = 0;
> +		i915.enable_guc_submission = 0;
> +	} else {
> +		/* A negative value means "use platform default" */
> +		if (i915.enable_guc_loading < 0)
> +			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> +		if (i915.enable_guc_submission < 0)
> +			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> +	}
> +
> +	/* can't enable guc submission without guc */
> +	if (!i915.enable_guc_loading)
> +		i915.enable_guc_submission = 0;
> +}
> +
>  void intel_uc_init_early(struct drm_i915_private *dev_priv)
>  {
>  	mutex_init(&dev_priv->guc.send_mutex);
> @@ -32,7 +50,10 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
>
>  void intel_uc_init(struct drm_i915_private *dev_priv)
>  {
> -	intel_guc_init(dev_priv);
> +	intel_sanitize_uc_params(dev_priv);

If we place intel_sanitize_uc_params in intel_sanitize_options we can 
have the parameters resolved earlier and we should therefore be able to 
use them to better handle GuC-related differences during driver load.

Daniele

> +
> +	if (i915.enable_guc_loading)
> +		intel_guc_init(dev_priv);
>  }
>
>  int intel_uc_load(struct drm_i915_private *dev_priv)
>
Arkadiusz Hiler Dec. 27, 2016, 4:26 p.m. UTC | #2
On Fri, Dec 23, 2016 at 01:19:18PM -0800, Daniele Ceraolo Spurio wrote:
> 
> 
> On 15/12/16 07:47, Arkadiusz Hiler wrote:
> > Let intel_guc_init() focus on determining and fetching the correct
> > firmware.
> > 
> > This patch introduces intel_sanitize_uc_params() that is called from
> > intel_uc_init().
> > 
> > Then, if we have GuC, we can call intel_guc_init() conditionally and we
> > do not have to do internal checks.
> > 
> > It can be easily extended to support HuC case as well.
> > 
> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > Cc: Jeff McGee <jeff.mcgee@intel.com>
> > Cc: Michal Winiarski <michal.winiarski@intel.com>
> > Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_guc_loader.c | 19 +------------------
> >  drivers/gpu/drm/i915/intel_uc.c         | 23 ++++++++++++++++++++++-
> >  2 files changed, 23 insertions(+), 19 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> > index b76b556..0bb5fd1 100644
> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> > @@ -617,7 +617,7 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
> >  }
> > 
> >  /**
> > - * intel_guc_init() - define parameters and fetch firmware
> > + * intel_guc_init() - determine and fetch firmware
> >   * @dev_priv:	i915 device private
> >   *
> >   * Called early during driver load, but after GEM is initialised.
> > @@ -630,17 +630,6 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
> >  	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> >  	const char *fw_path;
> > 
> > -	if (!HAS_GUC(dev_priv)) {
> > -		i915.enable_guc_loading = 0;
> > -		i915.enable_guc_submission = 0;
> > -	} else {
> > -		/* A negative value means "use platform default" */
> > -		if (i915.enable_guc_loading < 0)
> > -			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> > -		if (i915.enable_guc_submission < 0)
> > -			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> > -	}
> > -
> >  	if (!HAS_GUC_UCODE(dev_priv)) {
> >  		fw_path = NULL;
> >  	} else if (IS_SKYLAKE(dev_priv)) {
> > @@ -663,13 +652,7 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
> >  	guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
> >  	guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
> > 
> > -	/* can't enable guc submission without guc */
> > -	if (!i915.enable_guc_loading)
> > -		i915.enable_guc_submission = 0;
> > -
> >  	/* Early (and silent) return if GuC loading is disabled */
> > -	if (!i915.enable_guc_loading)
> > -		return;
> >  	if (fw_path == NULL)
> >  		return;
> >  	if (*fw_path == '\0')
> > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> > index 4e184edb..e72f784 100644
> > --- a/drivers/gpu/drm/i915/intel_uc.c
> > +++ b/drivers/gpu/drm/i915/intel_uc.c
> > @@ -25,6 +25,24 @@
> >  #include "i915_drv.h"
> >  #include "intel_uc.h"
> > 
> > +static void intel_sanitize_uc_params(struct drm_i915_private *dev_priv)
> > +{
> > +	if (!HAS_GUC(dev_priv)) {
> > +		i915.enable_guc_loading = 0;
> > +		i915.enable_guc_submission = 0;
> > +	} else {
> > +		/* A negative value means "use platform default" */
> > +		if (i915.enable_guc_loading < 0)
> > +			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> > +		if (i915.enable_guc_submission < 0)
> > +			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> > +	}
> > +
> > +	/* can't enable guc submission without guc */
> > +	if (!i915.enable_guc_loading)
> > +		i915.enable_guc_submission = 0;
> > +}
> > +
> >  void intel_uc_init_early(struct drm_i915_private *dev_priv)
> >  {
> >  	mutex_init(&dev_priv->guc.send_mutex);
> > @@ -32,7 +50,10 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
> > 
> >  void intel_uc_init(struct drm_i915_private *dev_priv)
> >  {
> > -	intel_guc_init(dev_priv);
> > +	intel_sanitize_uc_params(dev_priv);
> 
> If we place intel_sanitize_uc_params in intel_sanitize_options we can have
> the parameters resolved earlier and we should therefore be able to use them
> to better handle GuC-related differences during driver load.
> 
> Daniele

Agree. I haven't noticed the intel_sanitize_options().

> 
> > +
> > +	if (i915.enable_guc_loading)
> > +		intel_guc_init(dev_priv);
> >  }
> > 
> >  int intel_uc_load(struct drm_i915_private *dev_priv)
> >
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index b76b556..0bb5fd1 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -617,7 +617,7 @@  static void guc_fw_fetch(struct drm_i915_private *dev_priv,
 }
 
 /**
- * intel_guc_init() - define parameters and fetch firmware
+ * intel_guc_init() - determine and fetch firmware
  * @dev_priv:	i915 device private
  *
  * Called early during driver load, but after GEM is initialised.
@@ -630,17 +630,6 @@  void intel_guc_init(struct drm_i915_private *dev_priv)
 	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
 	const char *fw_path;
 
-	if (!HAS_GUC(dev_priv)) {
-		i915.enable_guc_loading = 0;
-		i915.enable_guc_submission = 0;
-	} else {
-		/* A negative value means "use platform default" */
-		if (i915.enable_guc_loading < 0)
-			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
-		if (i915.enable_guc_submission < 0)
-			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
-	}
-
 	if (!HAS_GUC_UCODE(dev_priv)) {
 		fw_path = NULL;
 	} else if (IS_SKYLAKE(dev_priv)) {
@@ -663,13 +652,7 @@  void intel_guc_init(struct drm_i915_private *dev_priv)
 	guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
 	guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
 
-	/* can't enable guc submission without guc */
-	if (!i915.enable_guc_loading)
-		i915.enable_guc_submission = 0;
-
 	/* Early (and silent) return if GuC loading is disabled */
-	if (!i915.enable_guc_loading)
-		return;
 	if (fw_path == NULL)
 		return;
 	if (*fw_path == '\0')
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 4e184edb..e72f784 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -25,6 +25,24 @@ 
 #include "i915_drv.h"
 #include "intel_uc.h"
 
+static void intel_sanitize_uc_params(struct drm_i915_private *dev_priv)
+{
+	if (!HAS_GUC(dev_priv)) {
+		i915.enable_guc_loading = 0;
+		i915.enable_guc_submission = 0;
+	} else {
+		/* A negative value means "use platform default" */
+		if (i915.enable_guc_loading < 0)
+			i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
+		if (i915.enable_guc_submission < 0)
+			i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
+	}
+
+	/* can't enable guc submission without guc */
+	if (!i915.enable_guc_loading)
+		i915.enable_guc_submission = 0;
+}
+
 void intel_uc_init_early(struct drm_i915_private *dev_priv)
 {
 	mutex_init(&dev_priv->guc.send_mutex);
@@ -32,7 +50,10 @@  void intel_uc_init_early(struct drm_i915_private *dev_priv)
 
 void intel_uc_init(struct drm_i915_private *dev_priv)
 {
-	intel_guc_init(dev_priv);
+	intel_sanitize_uc_params(dev_priv);
+
+	if (i915.enable_guc_loading)
+		intel_guc_init(dev_priv);
 }
 
 int intel_uc_load(struct drm_i915_private *dev_priv)