| Message ID | 10512254.nyUcL0zgTP@amdc3058 (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
Hi Bartlomiej, Am 15.12.2016 um 12:55 schrieb Bartlomiej Zolnierkiewicz: > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP > (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal > cooling maps to account for new OPPs. > > Since new OPPs are not available on all Exynos5422/5800 boards modify > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly. > > Tested on Odroid-XU3 and XU3 Lite. > > Cc: Doug Anderson <dianders@chromium.org> > Cc: Javier Martinez Canillas <javier@osg.samsung.com> > Cc: Andreas Faerber <afaerber@suse.de> > Cc: Thomas Abraham <thomas.ab@samsung.com> > Cc: Ben Gamari <ben@smart-cactus.org> > Cc: Arjun K V <arjun.kv@samsung.com> > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > --- > v2: > - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and > Peach Pi boards (suggested by Javier) > - removed redundant opp_a7_14 label > - added Arjun to Cc: > > Javier, could you test it on Peach Pi board? > > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 ++++++------- > arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 22 +++++++++++++++++++++ > arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 ++++++++ > arch/arm/boot/dts/exynos5800.dtsi | 15 ++++++++++++++ > 4 files changed, 53 insertions(+), 7 deletions(-) > > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi > =================================================================== > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.361955949 +0100 > @@ -118,7 +118,7 @@ > /* > * When reaching cpu_alert3, reduce CPU > * by 2 steps. On Exynos5422/5800 that would > - * be: 1600 MHz and 1100 MHz. > + * (usually) be: 1800 MHz and 1200 MHz. > */ > map3 { > trip = <&cpu_alert3>; > @@ -131,16 +131,16 @@ > > /* > * When reaching cpu_alert4, reduce CPU > - * further, down to 600 MHz (11 steps for big, > - * 7 steps for LITTLE). > + * further, down to 600 MHz (13 steps for big, > + * 8 steps for LITTLE). > */ > - map5 { > + cooling_map5: map5 { > trip = <&cpu_alert4>; > - cooling-device = <&cpu0 3 7>; > + cooling-device = <&cpu0 3 8>; > }; > - map6 { > + cooling_map6: map6 { > trip = <&cpu_alert4>; > - cooling-device = <&cpu4 3 11>; > + cooling-device = <&cpu4 3 13>; > }; > }; > }; > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts > =================================================================== > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.361955949 +0100 > @@ -21,6 +21,28 @@ > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; > }; > > +/* > + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies > + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. > + * Therefore we need to update OPPs tables and thermal maps accordingly. > + */ > +&cluster_a15_opp_table { > + /delete-node/opp@2000000000; > + /delete-node/opp@1900000000; > +}; > + > +&cluster_a7_opp_table { > + /delete-node/opp@1400000000; > +}; > + > +&cooling_map5 { > + cooling-device = <&cpu0 3 7>; > +}; > + > +&cooling_map6 { > + cooling-device = <&cpu4 3 11>; > +}; > + > &pwm { > /* > * PWM 0 -- fan > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts > =================================================================== > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.361955949 +0100 > @@ -146,6 +146,15 @@ > vdd-supply = <&ldo9_reg>; > }; > > +/* > + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores > + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to > + * update A7 OPPs table accordingly. > + */ > +&cluster_a7_opp_table { > + /delete-property/opp@1400000000; > +}; > + > &cpu0 { > cpu-supply = <&buck2_reg>; > }; > Index: b/arch/arm/boot/dts/exynos5800.dtsi > =================================================================== > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 > @@ -24,6 +24,16 @@ > }; > > &cluster_a15_opp_table { > + opp@2000000000 { > + opp-hz = /bits/ 64 <2000000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp@1900000000 { > + opp-hz = /bits/ 64 <1900000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > opp@1700000000 { > opp-microvolt = <1250000>; > }; > @@ -85,6 +95,11 @@ > }; > > &cluster_a7_opp_table { > + opp@1400000000 { > + opp-hz = /bits/ 64 <1400000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > opp@1300000000 { > opp-microvolt = <1250000>; > }; > On Odroid XU4, XU3 and XU3-lite: Tested-by: Markus Reichl <m.reichl@fivetechno.de> Thanks, -- Markus Reichl -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Thu, Dec 15, 2016 at 3:55 AM, Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> wrote: > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP > (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal > cooling maps to account for new OPPs. > > Since new OPPs are not available on all Exynos5422/5800 boards modify > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly. > > Tested on Odroid-XU3 and XU3 Lite. > > Cc: Doug Anderson <dianders@chromium.org> > Cc: Javier Martinez Canillas <javier@osg.samsung.com> > Cc: Andreas Faerber <afaerber@suse.de> > Cc: Thomas Abraham <thomas.ab@samsung.com> > Cc: Ben Gamari <ben@smart-cactus.org> > Cc: Arjun K V <arjun.kv@samsung.com> > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > --- > v2: > - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and > Peach Pi boards (suggested by Javier) > - removed redundant opp_a7_14 label > - added Arjun to Cc: > > Javier, could you test it on Peach Pi board? > > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 ++++++------- > arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 22 +++++++++++++++++++++ > arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 ++++++++ > arch/arm/boot/dts/exynos5800.dtsi | 15 ++++++++++++++ > 4 files changed, 53 insertions(+), 7 deletions(-) > > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi > =================================================================== > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.361955949 +0100 > @@ -118,7 +118,7 @@ > /* > * When reaching cpu_alert3, reduce CPU > * by 2 steps. On Exynos5422/5800 that would > - * be: 1600 MHz and 1100 MHz. > + * (usually) be: 1800 MHz and 1200 MHz. > */ > map3 { > trip = <&cpu_alert3>; > @@ -131,16 +131,16 @@ > > /* > * When reaching cpu_alert4, reduce CPU > - * further, down to 600 MHz (11 steps for big, > - * 7 steps for LITTLE). > + * further, down to 600 MHz (13 steps for big, > + * 8 steps for LITTLE). > */ > - map5 { > + cooling_map5: map5 { > trip = <&cpu_alert4>; > - cooling-device = <&cpu0 3 7>; > + cooling-device = <&cpu0 3 8>; > }; > - map6 { > + cooling_map6: map6 { > trip = <&cpu_alert4>; > - cooling-device = <&cpu4 3 11>; > + cooling-device = <&cpu4 3 13>; > }; > }; > }; > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts > =================================================================== > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.361955949 +0100 > @@ -21,6 +21,28 @@ > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; > }; > > +/* > + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies > + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. > + * Therefore we need to update OPPs tables and thermal maps accordingly. > + */ > +&cluster_a15_opp_table { > + /delete-node/opp@2000000000; > + /delete-node/opp@1900000000; > +}; > + > +&cluster_a7_opp_table { > + /delete-node/opp@1400000000; > +}; > + > +&cooling_map5 { > + cooling-device = <&cpu0 3 7>; > +}; > + > +&cooling_map6 { > + cooling-device = <&cpu4 3 11>; > +}; > + > &pwm { > /* > * PWM 0 -- fan > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts > =================================================================== > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.361955949 +0100 > @@ -146,6 +146,15 @@ > vdd-supply = <&ldo9_reg>; > }; > > +/* > + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores > + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to > + * update A7 OPPs table accordingly. > + */ > +&cluster_a7_opp_table { > + /delete-property/opp@1400000000; > +}; > + > &cpu0 { > cpu-supply = <&buck2_reg>; > }; > Index: b/arch/arm/boot/dts/exynos5800.dtsi > =================================================================== > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 > @@ -24,6 +24,16 @@ > }; > > &cluster_a15_opp_table { > + opp@2000000000 { > + opp-hz = /bits/ 64 <2000000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp@1900000000 { > + opp-hz = /bits/ 64 <1900000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; I don't think the voltages you listed are high enough for all peach pi boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research I did. See my response to v1. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello Bartlomiej, On 12/15/2016 08:55 AM, Bartlomiej Zolnierkiewicz wrote: > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP > (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal > cooling maps to account for new OPPs. > > Since new OPPs are not available on all Exynos5422/5800 boards modify > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly. > > Tested on Odroid-XU3 and XU3 Lite. > > Cc: Doug Anderson <dianders@chromium.org> > Cc: Javier Martinez Canillas <javier@osg.samsung.com> > Cc: Andreas Faerber <afaerber@suse.de> > Cc: Thomas Abraham <thomas.ab@samsung.com> > Cc: Ben Gamari <ben@smart-cactus.org> > Cc: Arjun K V <arjun.kv@samsung.com> > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > --- > v2: > - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and > Peach Pi boards (suggested by Javier) > - removed redundant opp_a7_14 label > - added Arjun to Cc: > > Javier, could you test it on Peach Pi board? > I've tested this patch on my Peach Pi by setting the CPUFreq governor to performance and checking that the current scaling frequency was 2.0 GHz: $ cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq 2000000 2000000 2000000 2000000 1400000 1400000 1400000 1400000 I ran the machine for hours and it didn't became unstable. Also installed the stress [0] tool and setting the governor to ondemand, I executed: $ stress --cpu 8 For about 30 minutes, the current frequencies were again the maximum and had no issues. Finally, I tested some devices that are under the INT rail (MFC and GSC) by using the following GStreamer pipeline: $ gst-launch-1.0 filesrc location=test-1080p.mp4 ! qtdemux ! h264parse ! \ v4l2video5dec ! v4l2video7convert capture-io-mode=dmabuf ! kmssink Again, the system keeps working correctly. So I think it's safe to say: Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> I can't provide a Reviewed-by since is still not clear to me if these OPP values are correct or not due the ChromiumOS tree using higher voltages. FWIW, the chip ID block information on my Exynos5800 Peach Pi is: Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x350c82f8] AUX_INFO[0x4d] [0]: http://people.seas.harvard.edu/~apw/stress/ Best regards,
On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote: > > Index: b/arch/arm/boot/dts/exynos5800.dtsi > > =================================================================== > > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 > > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 > > @@ -24,6 +24,16 @@ > > }; > > > > &cluster_a15_opp_table { > > + opp@2000000000 { > > + opp-hz = /bits/ 64 <2000000000>; > > + opp-microvolt = <1250000>; > > + clock-latency-ns = <140000>; > > + }; > > + opp@1900000000 { > > + opp-hz = /bits/ 64 <1900000000>; > > + opp-microvolt = <1250000>; > > + clock-latency-ns = <140000>; > > + }; > > I don't think the voltages you listed are high enough for all peach pi > boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research > I did. See my response to v1. I wanted to apply this but saw this remaining issue. Javier tested it on Peach Pi so is this concern still valid? Bartlomiej, When sending dts patches please stick to the common subsystem prefix (git log --oneline arch/arm/boot/dts/exynos*). Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Thu, Dec 29, 2016 at 6:17 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote: > On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote: >> > Index: b/arch/arm/boot/dts/exynos5800.dtsi >> > =================================================================== >> > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 >> > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 >> > @@ -24,6 +24,16 @@ >> > }; >> > >> > &cluster_a15_opp_table { >> > + opp@2000000000 { >> > + opp-hz = /bits/ 64 <2000000000>; >> > + opp-microvolt = <1250000>; >> > + clock-latency-ns = <140000>; >> > + }; >> > + opp@1900000000 { >> > + opp-hz = /bits/ 64 <1900000000>; >> > + opp-microvolt = <1250000>; >> > + clock-latency-ns = <140000>; >> > + }; >> >> I don't think the voltages you listed are high enough for all peach pi >> boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research >> I did. See my response to v1. > > I wanted to apply this but saw this remaining issue. Javier tested it > on Peach Pi so is this concern still valid? I'm not sure. It's been years since I did anything with exynos, so I won't stand in the way if everyone else agrees that this patch is good, but I will point out that testing on a single Peach Pi board is not really enough given the massive difference in voltage needed between the highest ASV group and the lowest (a whopping 112.5 mV from looking in the Chrome OS source tree). -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello Doug, On 01/04/2017 06:05 PM, Doug Anderson wrote: > Hi, > > On Thu, Dec 29, 2016 at 6:17 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote: >> On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote: >>>> Index: b/arch/arm/boot/dts/exynos5800.dtsi >>>> =================================================================== >>>> --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 >>>> +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 >>>> @@ -24,6 +24,16 @@ >>>> }; >>>> >>>> &cluster_a15_opp_table { >>>> + opp@2000000000 { >>>> + opp-hz = /bits/ 64 <2000000000>; >>>> + opp-microvolt = <1250000>; >>>> + clock-latency-ns = <140000>; >>>> + }; >>>> + opp@1900000000 { >>>> + opp-hz = /bits/ 64 <1900000000>; >>>> + opp-microvolt = <1250000>; >>>> + clock-latency-ns = <140000>; >>>> + }; >>> >>> I don't think the voltages you listed are high enough for all peach pi >>> boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research >>> I did. See my response to v1. >> >> I wanted to apply this but saw this remaining issue. Javier tested it >> on Peach Pi so is this concern still valid? > > I'm not sure. It's been years since I did anything with exynos, so I > won't stand in the way if everyone else agrees that this patch is > good, but I will point out that testing on a single Peach Pi board is > not really enough given the massive difference in voltage needed > between the highest ASV group and the lowest (a whopping 112.5 mV from > looking in the Chrome OS source tree). > I agree. That's why answered that I wasn't able to find regressions on the Peach Pi I've access to, but I couldn't provide a Reviewed-by tag since it wasn't clear to me that the values were safe for any Exynos5420/5422/5800. > -Doug Best regards,
On Wed, Jan 04, 2017 at 08:57:47PM -0300, Javier Martinez Canillas wrote: > Hello Doug, > > On 01/04/2017 06:05 PM, Doug Anderson wrote: > > Hi, > > > > On Thu, Dec 29, 2016 at 6:17 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote: > >>>> Index: b/arch/arm/boot/dts/exynos5800.dtsi > >>>> =================================================================== > >>>> --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 > >>>> +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 > >>>> @@ -24,6 +24,16 @@ > >>>> }; > >>>> > >>>> &cluster_a15_opp_table { > >>>> + opp@2000000000 { > >>>> + opp-hz = /bits/ 64 <2000000000>; > >>>> + opp-microvolt = <1250000>; > >>>> + clock-latency-ns = <140000>; > >>>> + }; > >>>> + opp@1900000000 { > >>>> + opp-hz = /bits/ 64 <1900000000>; > >>>> + opp-microvolt = <1250000>; > >>>> + clock-latency-ns = <140000>; > >>>> + }; > >>> > >>> I don't think the voltages you listed are high enough for all peach pi > >>> boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research > >>> I did. See my response to v1. > >> > >> I wanted to apply this but saw this remaining issue. Javier tested it > >> on Peach Pi so is this concern still valid? > > > > I'm not sure. It's been years since I did anything with exynos, so I > > won't stand in the way if everyone else agrees that this patch is > > good, but I will point out that testing on a single Peach Pi board is > > not really enough given the massive difference in voltage needed > > between the highest ASV group and the lowest (a whopping 112.5 mV from > > looking in the Chrome OS source tree). > > > > I agree. That's why answered that I wasn't able to find regressions on the > Peach Pi I've access to, but I couldn't provide a Reviewed-by tag since it > wasn't clear to me that the values were safe for any Exynos5420/5422/5800. The value of 1.250 V seems to be covering only half of ASV values for 2.0 GHz so indeed it might be insufficient for some of the chips. Unfortunately... Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi =================================================================== --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.361955949 +0100 @@ -118,7 +118,7 @@ /* * When reaching cpu_alert3, reduce CPU * by 2 steps. On Exynos5422/5800 that would - * be: 1600 MHz and 1100 MHz. + * (usually) be: 1800 MHz and 1200 MHz. */ map3 { trip = <&cpu_alert3>; @@ -131,16 +131,16 @@ /* * When reaching cpu_alert4, reduce CPU - * further, down to 600 MHz (11 steps for big, - * 7 steps for LITTLE). + * further, down to 600 MHz (13 steps for big, + * 8 steps for LITTLE). */ - map5 { + cooling_map5: map5 { trip = <&cpu_alert4>; - cooling-device = <&cpu0 3 7>; + cooling-device = <&cpu0 3 8>; }; - map6 { + cooling_map6: map6 { trip = <&cpu_alert4>; - cooling-device = <&cpu4 3 11>; + cooling-device = <&cpu4 3 13>; }; }; }; Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts =================================================================== --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.361955949 +0100 @@ -21,6 +21,28 @@ compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; }; +/* + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. + * Therefore we need to update OPPs tables and thermal maps accordingly. + */ +&cluster_a15_opp_table { + /delete-node/opp@2000000000; + /delete-node/opp@1900000000; +}; + +&cluster_a7_opp_table { + /delete-node/opp@1400000000; +}; + +&cooling_map5 { + cooling-device = <&cpu0 3 7>; +}; + +&cooling_map6 { + cooling-device = <&cpu4 3 11>; +}; + &pwm { /* * PWM 0 -- fan Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts =================================================================== --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.361955949 +0100 @@ -146,6 +146,15 @@ vdd-supply = <&ldo9_reg>; }; +/* + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to + * update A7 OPPs table accordingly. + */ +&cluster_a7_opp_table { + /delete-property/opp@1400000000; +}; + &cpu0 { cpu-supply = <&buck2_reg>; }; Index: b/arch/arm/boot/dts/exynos5800.dtsi =================================================================== --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100 +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100 @@ -24,6 +24,16 @@ }; &cluster_a15_opp_table { + opp@2000000000 { + opp-hz = /bits/ 64 <2000000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; + opp@1900000000 { + opp-hz = /bits/ 64 <1900000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; opp@1700000000 { opp-microvolt = <1250000>; }; @@ -85,6 +95,11 @@ }; &cluster_a7_opp_table { + opp@1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; opp@1300000000 { opp-microvolt = <1250000>; };
Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal cooling maps to account for new OPPs. Since new OPPs are not available on all Exynos5422/5800 boards modify dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach Pi (limited to 2.0 GHz / 1.3 GHz) accordingly. Tested on Odroid-XU3 and XU3 Lite. Cc: Doug Anderson <dianders@chromium.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: Andreas Faerber <afaerber@suse.de> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Ben Gamari <ben@smart-cactus.org> Cc: Arjun K V <arjun.kv@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> --- v2: - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and Peach Pi boards (suggested by Javier) - removed redundant opp_a7_14 label - added Arjun to Cc: Javier, could you test it on Peach Pi board? arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 ++++++------- arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 22 +++++++++++++++++++++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 ++++++++ arch/arm/boot/dts/exynos5800.dtsi | 15 ++++++++++++++ 4 files changed, 53 insertions(+), 7 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html