| Message ID | 3689701f93c8426bfa476e9a5f31c3642a8a898e.1483980339.git-series.maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jan 10, 2017 at 12:46 AM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > All the controllers can have a maximum frequency of 200MHz. > > Since older SoCs cannot go that high, we cannot change the default maximum > frequency, but fortunately for us we have a property for that in the DT. > > This also has the side effect of allowing to use the MMC HS200 mode for the > boards that support it (with either 1.2v or 1.8v IOs). > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ > 1 file changed, 3 insertions(+), 0 deletions(-) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 8e149498e096..f46ae965cf5b 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -332,6 +332,7 @@ > resets = <&ccu RST_BUS_MMC0>; > reset-names = "ahb"; > interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; > + max-frequency = <200000000>; You also have to set one of MMC_CAP2_HS200* in the driver, or mmc-hs200-1_8v or mmc-hs200-1_2v in the device tree to actually use HS200, right? ChenYu > status = "disabled"; > #address-cells = <1>; > #size-cells = <0>; > @@ -345,6 +346,7 @@ > resets = <&ccu RST_BUS_MMC1>; > reset-names = "ahb"; > interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; > + max-frequency = <200000000>; > status = "disabled"; > #address-cells = <1>; > #size-cells = <0>; > @@ -358,6 +360,7 @@ > resets = <&ccu RST_BUS_MMC2>; > reset-names = "ahb"; > interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > + max-frequency = <200000000>; > status = "disabled"; > #address-cells = <1>; > #size-cells = <0>; > -- > git-series 0.8.11 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Tue, Jan 10, 2017 at 01:01:20AM +0800, Chen-Yu Tsai wrote: > On Tue, Jan 10, 2017 at 12:46 AM, Maxime Ripard > <maxime.ripard@free-electrons.com> wrote: > > All the controllers can have a maximum frequency of 200MHz. > > > > Since older SoCs cannot go that high, we cannot change the default maximum > > frequency, but fortunately for us we have a property for that in the DT. > > > > This also has the side effect of allowing to use the MMC HS200 mode for the > > boards that support it (with either 1.2v or 1.8v IOs). > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > --- > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ > > 1 file changed, 3 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > index 8e149498e096..f46ae965cf5b 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > @@ -332,6 +332,7 @@ > > resets = <&ccu RST_BUS_MMC0>; > > reset-names = "ahb"; > > interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; > > + max-frequency = <200000000>; > > You also have to set one of MMC_CAP2_HS200* in the driver, > or mmc-hs200-1_8v or mmc-hs200-1_2v in the device tree to > actually use HS200, right? Yes, but that requires a board with 1.8V IOs to work properly, which not all board use, so it's probably best to enable it in the board DTS. Thanks! Maxime
On Wed, Jan 11, 2017 at 3:15 AM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > Hi, > > On Tue, Jan 10, 2017 at 01:01:20AM +0800, Chen-Yu Tsai wrote: >> On Tue, Jan 10, 2017 at 12:46 AM, Maxime Ripard >> <maxime.ripard@free-electrons.com> wrote: >> > All the controllers can have a maximum frequency of 200MHz. >> > >> > Since older SoCs cannot go that high, we cannot change the default maximum >> > frequency, but fortunately for us we have a property for that in the DT. >> > >> > This also has the side effect of allowing to use the MMC HS200 mode for the >> > boards that support it (with either 1.2v or 1.8v IOs). >> > >> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> >> > --- >> > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ >> > 1 file changed, 3 insertions(+), 0 deletions(-) >> > >> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> > index 8e149498e096..f46ae965cf5b 100644 >> > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> > @@ -332,6 +332,7 @@ >> > resets = <&ccu RST_BUS_MMC0>; >> > reset-names = "ahb"; >> > interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; >> > + max-frequency = <200000000>; >> >> You also have to set one of MMC_CAP2_HS200* in the driver, >> or mmc-hs200-1_8v or mmc-hs200-1_2v in the device tree to >> actually use HS200, right? > > Yes, but that requires a board with 1.8V IOs to work properly, which > not all board use, so it's probably best to enable it in the board > DTS. It's limited by the vqmmc regulator. Either way the host controller supports it right? ChenYu -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Wed, Jan 11, 2017 at 02:44:00PM +0800, Chen-Yu Tsai wrote: > On Wed, Jan 11, 2017 at 3:15 AM, Maxime Ripard > <maxime.ripard@free-electrons.com> wrote: > > Hi, > > > > On Tue, Jan 10, 2017 at 01:01:20AM +0800, Chen-Yu Tsai wrote: > >> On Tue, Jan 10, 2017 at 12:46 AM, Maxime Ripard > >> <maxime.ripard@free-electrons.com> wrote: > >> > All the controllers can have a maximum frequency of 200MHz. > >> > > >> > Since older SoCs cannot go that high, we cannot change the default maximum > >> > frequency, but fortunately for us we have a property for that in the DT. > >> > > >> > This also has the side effect of allowing to use the MMC HS200 mode for the > >> > boards that support it (with either 1.2v or 1.8v IOs). > >> > > >> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > >> > --- > >> > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ > >> > 1 file changed, 3 insertions(+), 0 deletions(-) > >> > > >> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > >> > index 8e149498e096..f46ae965cf5b 100644 > >> > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > >> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > >> > @@ -332,6 +332,7 @@ > >> > resets = <&ccu RST_BUS_MMC0>; > >> > reset-names = "ahb"; > >> > interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; > >> > + max-frequency = <200000000>; > >> > >> You also have to set one of MMC_CAP2_HS200* in the driver, > >> or mmc-hs200-1_8v or mmc-hs200-1_2v in the device tree to > >> actually use HS200, right? > > > > Yes, but that requires a board with 1.8V IOs to work properly, which > > not all board use, so it's probably best to enable it in the board > > DTS. > > It's limited by the vqmmc regulator. Either way the host controller > supports it right? Yes, but if the card supports HS200 with 1.8V, and the controller reports it too, the core will pick that mode and will try to switch to it, which in turn will fail, making the card initialisation fail as well. We basically have two choices: either we ask all the boards that support it to set mmc-hs200-1_8v in their DTS, or we set it in the DTSI and we have the boards set no-1-8-v in their DTS if they do not support those modes. The first case is just the more convenient, because so far we've only seen one non-upstream (yet) board that supports 1.8V IOs. All the other do not. Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 8e149498e096..f46ae965cf5b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -332,6 +332,7 @@ resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -345,6 +346,7 @@ resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -358,6 +360,7 @@ resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;
All the controllers can have a maximum frequency of 200MHz. Since older SoCs cannot go that high, we cannot change the default maximum frequency, but fortunately for us we have a property for that in the DT. This also has the side effect of allowing to use the MMC HS200 mode for the boards that support it (with either 1.2v or 1.8v IOs). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ 1 file changed, 3 insertions(+), 0 deletions(-)