diff mbox

[36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP

Message ID 1484216786-17292-37-git-send-email-kishon@ti.com (mailing list archive)
State Not Applicable, archived
Delegated to: Andy Gross
Headers show

Commit Message

Kishon Vijay Abraham I Jan. 12, 2017, 10:26 a.m. UTC
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
in RC mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/mach-omap2/clockdomains7xx_data.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tony Lindgren Jan. 13, 2017, 5:15 p.m. UTC | #1
* Kishon Vijay Abraham I <kishon@ti.com> [170112 02:35]:
> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
> be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
> in RC mode. However in EP mode, the host system is not able to access the
> MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.

I guess ideally in the long run we would set this dynamically based on
the selected mode, right?

Regards,

Tony

> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  arch/arm/mach-omap2/clockdomains7xx_data.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
> index 6c67965..67ebff8 100644
> --- a/arch/arm/mach-omap2/clockdomains7xx_data.c
> +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
> @@ -524,7 +524,7 @@
>  	.dep_bit	  = DRA7XX_PCIE_STATDEP_SHIFT,
>  	.wkdep_srcs	  = pcie_wkup_sleep_deps,
>  	.sleepdep_srcs	  = pcie_wkup_sleep_deps,
> -	.flags		  = CLKDM_CAN_HWSUP_SWSUP,
> +	.flags		  = CLKDM_CAN_SWSUP,
>  };
>  
>  static struct clockdomain atl_7xx_clkdm = {
> -- 
> 1.7.9.5
> 
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Kishon Vijay Abraham I Jan. 16, 2017, 6:05 a.m. UTC | #2
Hi Tony,

On Friday 13 January 2017 10:45 PM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I <kishon@ti.com> [170112 02:35]:
>> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
>> be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
>> in RC mode. However in EP mode, the host system is not able to access the
>> MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
> 
> I guess ideally in the long run we would set this dynamically based on
> the selected mode, right?

The programming sequence mentioned in the TRM w.r.t clock programming is same
for both host mode or device mode. Though we never faced any issues in host
mode when HW_AUTO is set, it's better to follow TRM recommended settings IMHO.

Thanks
Kishon

> 
> Regards,
> 
> Tony
> 
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  arch/arm/mach-omap2/clockdomains7xx_data.c |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
>> index 6c67965..67ebff8 100644
>> --- a/arch/arm/mach-omap2/clockdomains7xx_data.c
>> +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
>> @@ -524,7 +524,7 @@
>>  	.dep_bit	  = DRA7XX_PCIE_STATDEP_SHIFT,
>>  	.wkdep_srcs	  = pcie_wkup_sleep_deps,
>>  	.sleepdep_srcs	  = pcie_wkup_sleep_deps,
>> -	.flags		  = CLKDM_CAN_HWSUP_SWSUP,
>> +	.flags		  = CLKDM_CAN_SWSUP,
>>  };
>>  
>>  static struct clockdomain atl_7xx_clkdm = {
>> -- 
>> 1.7.9.5
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo@vger.kernel.org
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>>
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Tony Lindgren Jan. 20, 2017, 6:28 p.m. UTC | #3
* Kishon Vijay Abraham I <kishon@ti.com> [170115 22:06]:
> Hi Tony,
> 
> On Friday 13 January 2017 10:45 PM, Tony Lindgren wrote:
> > * Kishon Vijay Abraham I <kishon@ti.com> [170112 02:35]:
> >> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
> >> be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
> >> in RC mode. However in EP mode, the host system is not able to access the
> >> MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
> > 
> > I guess ideally in the long run we would set this dynamically based on
> > the selected mode, right?
> 
> The programming sequence mentioned in the TRM w.r.t clock programming is same
> for both host mode or device mode. Though we never faced any issues in host
> mode when HW_AUTO is set, it's better to follow TRM recommended settings IMHO.

OK best to merge this with the whole series:

Acked-by: Tony Lindgren <tony@atomide.com>
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
index 6c67965..67ebff8 100644
--- a/arch/arm/mach-omap2/clockdomains7xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
@@ -524,7 +524,7 @@ 
 	.dep_bit	  = DRA7XX_PCIE_STATDEP_SHIFT,
 	.wkdep_srcs	  = pcie_wkup_sleep_deps,
 	.sleepdep_srcs	  = pcie_wkup_sleep_deps,
-	.flags		  = CLKDM_CAN_HWSUP_SWSUP,
+	.flags		  = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain atl_7xx_clkdm = {