diff mbox

[6/6] drm/i915/get_params: Add HuC status to getparams

Message ID 1484755558-1234-6-git-send-email-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Srivatsa, Anusha Jan. 18, 2017, 4:05 p.m. UTC
This patch will allow for getparams to return the status of the HuC.
As the HuC has to be validated by the GuC this patch uses the validated
status to show when the HuC is loaded and ready for use. You cannot use
the loaded status as with the GuC as the HuC is verified after it is
loaded and is not usable until it is verified.

v2: removed the forewakes as the registers are already force-woken.
     (T.Ursulin)
v3: rebased on top of drm-tip. Removed any reference to intel_huc.h
v4: rebased. Rename I915_PARAM_HAS_HUC to I915_PARAM_HUC_STATUS.
Remove intel_is_huc_valid() since it is used only in one place.
Put the case of I915_PARAM_HAS_HUC() in the right place.
v5: rebased. Add a comment to specify that I915_READ(reg)
does not read garbage value. The register HUC_STATUS2 is force
woken and no rpm is needed.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 7 +++++++
 include/uapi/drm/i915_drm.h     | 1 +
 2 files changed, 8 insertions(+)

Comments

Daniel Vetter Jan. 23, 2017, 6:02 a.m. UTC | #1
On Wed, Jan 18, 2017 at 5:05 PM, Anusha Srivatsa
<anusha.srivatsa@intel.com> wrote:
> This patch will allow for getparams to return the status of the HuC.
> As the HuC has to be validated by the GuC this patch uses the validated
> status to show when the HuC is loaded and ready for use. You cannot use
> the loaded status as with the GuC as the HuC is verified after it is
> loaded and is not usable until it is verified.
>
> v2: removed the forewakes as the registers are already force-woken.
>      (T.Ursulin)
> v3: rebased on top of drm-tip. Removed any reference to intel_huc.h
> v4: rebased. Rename I915_PARAM_HAS_HUC to I915_PARAM_HUC_STATUS.
> Remove intel_is_huc_valid() since it is used only in one place.
> Put the case of I915_PARAM_HAS_HUC() in the right place.
> v5: rebased. Add a comment to specify that I915_READ(reg)
> does not read garbage value. The register HUC_STATUS2 is force
> woken and no rpm is needed.
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Peter Antoine <peter.antoine@intel.com>
> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 7 +++++++
>  include/uapi/drm/i915_drm.h     | 1 +
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index d1197aa..4ae69eb 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -49,6 +49,7 @@
>  #include "i915_trace.h"
>  #include "i915_vgpu.h"
>  #include "intel_drv.h"
> +#include "intel_uc.h"
>
>  static struct drm_driver driver;
>
> @@ -315,6 +316,12 @@ static int i915_getparam(struct drm_device *dev, void *data,
>         case I915_PARAM_MIN_EU_IN_POOL:
>                 value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;
>                 break;
> +       case I915_PARAM_HUC_STATUS:
> +               /* The register is already force-woken. We dont need
> +                * any rpm here
> +                */

I'm pretty sure this is broken - if the chip is runtime suspended all
writes will return 0. There's no forcewake thing going on, that is
separate from rpm. Has this been tested? Just a drive-by comment since
I checked whether we do have the userspace for this stuff.
-Daniel

> +               value = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> +               break;
>         case I915_PARAM_MMAP_GTT_VERSION:
>                 /* Though we've started our numbering from 1, and so class all
>                  * earlier versions as 0, in effect their value is undefined as
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index da32c2f..57093b4 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -395,6 +395,7 @@ typedef struct drm_i915_irq_wait {
>   * priorities and the driver will attempt to execute batches in priority order.
>   */
>  #define I915_PARAM_HAS_SCHEDULER        41
> +#define I915_PARAM_HUC_STATUS           42
>
>  typedef struct drm_i915_getparam {
>         __s32 param;
> --
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d1197aa..4ae69eb 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -49,6 +49,7 @@ 
 #include "i915_trace.h"
 #include "i915_vgpu.h"
 #include "intel_drv.h"
+#include "intel_uc.h"
 
 static struct drm_driver driver;
 
@@ -315,6 +316,12 @@  static int i915_getparam(struct drm_device *dev, void *data,
 	case I915_PARAM_MIN_EU_IN_POOL:
 		value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;
 		break;
+	case I915_PARAM_HUC_STATUS:
+		/* The register is already force-woken. We dont need
+		 * any rpm here
+		 */
+		value = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+		break;
 	case I915_PARAM_MMAP_GTT_VERSION:
 		/* Though we've started our numbering from 1, and so class all
 		 * earlier versions as 0, in effect their value is undefined as
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index da32c2f..57093b4 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -395,6 +395,7 @@  typedef struct drm_i915_irq_wait {
  * priorities and the driver will attempt to execute batches in priority order.
  */
 #define I915_PARAM_HAS_SCHEDULER	 41
+#define I915_PARAM_HUC_STATUS		 42
 
 typedef struct drm_i915_getparam {
 	__s32 param;