diff mbox

[v2] ARM: dts: i.MX25: add AIPS control registers

Message ID 1485987378-27784-1-git-send-email-martin@kaiser.cx (mailing list archive)
State New, archived
Headers show

Commit Message

Martin Kaiser Feb. 1, 2017, 10:16 p.m. UTC
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
v2:
   removed the "fsl,imx53-aipstz" property as per Sascha's request

 arch/arm/boot/dts/imx25.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Sascha Hauer Feb. 2, 2017, 7:09 a.m. UTC | #1
Hi Martin,

On Wed, Feb 01, 2017 at 11:16:18PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
> control registers. Add the memory regions for the control registers to
> the Device Tree.
> 
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> ---
> v2:
>    removed the "fsl,imx53-aipstz" property as per Sascha's request
> 
>  arch/arm/boot/dts/imx25.dtsi |   10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
> index e0ba550..1914858 100644
> --- a/arch/arm/boot/dts/imx25.dtsi
> +++ b/arch/arm/boot/dts/imx25.dtsi
> @@ -93,6 +93,11 @@
>  			reg = <0x43f00000 0x100000>;
>  			ranges;
>  
> +			aips1: bridge@43f00000 {
> +				compatible = "fsl,imx25-aips";
> +				reg = <0x43f00000 0x60>;
> +			};

One thing I haven't seen the first time: The size should be the size of
the while register space given to this device, not the position of the
last register, so 0x4000 instead of 0x60 here.

Sascha
diff mbox

Patch

diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e0ba550..1914858 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -93,6 +93,11 @@ 
 			reg = <0x43f00000 0x100000>;
 			ranges;
 
+			aips1: bridge@43f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x43f00000 0x60>;
+			};
+
 			i2c1: i2c@43f80000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -342,6 +347,11 @@ 
 			reg = <0x53f00000 0x100000>;
 			ranges;
 
+			aips2: bridge@53f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x53f00000 0x60>;
+			};
+
 			clks: ccm@53f80000 {
 				compatible = "fsl,imx25-ccm";
 				reg = <0x53f80000 0x4000>;