| Message ID | 1484926369-30910-1-git-send-email-andrea.merello@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On Fri, Jan 20, 2017 at 04:32:45PM +0100, Andrea Merello wrote: > The HW can be either direct-access or scatter-gather version. These are > SW incompatible. > > The driver can handle both version: a DT propriety was used to > tell the driver whether to assume the HW is is scatter-gather mode. > > This patch makes the driver to autodetect this information. The DT > propriety is not required anymore. /s/propriety/property > > Signed-off-by: Andrea Merello <andrea.merello@gmail.com> > --- > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 --- > drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++---- > 2 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > index a2b8bfa..2897e6d 100644 > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > @@ -37,9 +37,6 @@ Required properties: > Required properties for VDMA: > - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. > > -Optional properties: > -- xlnx,include-sg: Tells configured for Scatter-mode in > - the hardware. This is optional for now. And binding are ABI, so how do you handle the case where we have older binding with this one absent?? But then you are auto-detecting... > Optional properties for AXI DMA: > - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware. > Optional properties for VDMA: > diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c > index 8288fe4..b99094c 100644 > --- a/drivers/dma/xilinx/xilinx_dma.c > +++ b/drivers/dma/xilinx/xilinx_dma.c > @@ -86,6 +86,7 @@ > #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) > #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) > #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) > +#define XILINX_DMA_DMASR_SG_MASK BIT(3) > #define XILINX_DMA_DMASR_IDLE BIT(1) > #define XILINX_DMA_DMASR_HALTED BIT(0) > #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) > @@ -377,7 +378,6 @@ struct xilinx_dma_config { > * @dev: Device Structure > * @common: DMA device structure > * @chan: Driver specific DMA channel > - * @has_sg: Specifies whether Scatter-Gather is present or not > * @mcdma: Specifies whether Multi-Channel is present or not > * @flush_on_fsync: Flush on frame sync > * @ext_addr: Indicates 64 bit addressing is supported by dma device > @@ -396,7 +396,6 @@ struct xilinx_dma_device { > struct device *dev; > struct dma_device common; > struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; > - bool has_sg; > bool mcdma; > u32 flush_on_fsync; > bool ext_addr; > @@ -2324,7 +2323,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, > > chan->dev = xdev->dev; > chan->xdev = xdev; > - chan->has_sg = xdev->has_sg; > chan->desc_pendingcount = 0x0; > chan->ext_addr = xdev->ext_addr; > > @@ -2404,6 +2402,13 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, > else > chan->start_transfer = xilinx_vdma_start_transfer; > > + /* check if SG is enabled */ > + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & > + XILINX_DMA_DMASR_SG_MASK) > + chan->has_sg = true; > + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, > + chan->has_sg ? "enabled" : "disabled"); > + > /* Initialize the tasklet */ > tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, > (unsigned long)chan); > @@ -2541,7 +2546,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) > return PTR_ERR(xdev->regs); > > /* Retrieve the DMA engine properties from the device tree */ > - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); > if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) > xdev->mcdma = of_property_read_bool(node, "xlnx,mcdma"); > > -- > 2.7.4 >
On Sun, Feb 5, 2017 at 6:32 AM, Vinod Koul <vinod.koul@intel.com> wrote: > On Fri, Jan 20, 2017 at 04:32:45PM +0100, Andrea Merello wrote: >> The HW can be either direct-access or scatter-gather version. These are >> SW incompatible. >> >> The driver can handle both version: a DT propriety was used to >> tell the driver whether to assume the HW is is scatter-gather mode. >> >> This patch makes the driver to autodetect this information. The DT >> propriety is not required anymore. > > /s/propriety/property OK >> >> Signed-off-by: Andrea Merello <andrea.merello@gmail.com> >> --- >> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 --- >> drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++---- >> 2 files changed, 8 insertions(+), 7 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt >> index a2b8bfa..2897e6d 100644 >> --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt >> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt >> @@ -37,9 +37,6 @@ Required properties: >> Required properties for VDMA: >> - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. >> >> -Optional properties: >> -- xlnx,include-sg: Tells configured for Scatter-mode in >> - the hardware. > > This is optional for now. And binding are ABI, so how do you handle the case > where we have older binding with this one absent?? > > But then you are auto-detecting... The property had to match the HW configuration: the property served to recognize if the HW has been implemented with SG or not; it had to be present (only) in the first case. With this patch the HW is autodetected, so the property became simply useless. In case of older binding with this absent, thus we are in case "the HW has no SG", the driver should detect that the HW has no SG and behave accordingly. On the other hand, in case of an old binding with this property present, thus we are in case "the HW does support SG", we ignore the property and we just autodetect that the HW has SG. So I would say we are still ABI-compatible.. >> Optional properties for AXI DMA: >> - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware. >> Optional properties for VDMA: >> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c >> index 8288fe4..b99094c 100644 >> --- a/drivers/dma/xilinx/xilinx_dma.c >> +++ b/drivers/dma/xilinx/xilinx_dma.c >> @@ -86,6 +86,7 @@ >> #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) >> #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) >> #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) >> +#define XILINX_DMA_DMASR_SG_MASK BIT(3) >> #define XILINX_DMA_DMASR_IDLE BIT(1) >> #define XILINX_DMA_DMASR_HALTED BIT(0) >> #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) >> @@ -377,7 +378,6 @@ struct xilinx_dma_config { >> * @dev: Device Structure >> * @common: DMA device structure >> * @chan: Driver specific DMA channel >> - * @has_sg: Specifies whether Scatter-Gather is present or not >> * @mcdma: Specifies whether Multi-Channel is present or not >> * @flush_on_fsync: Flush on frame sync >> * @ext_addr: Indicates 64 bit addressing is supported by dma device >> @@ -396,7 +396,6 @@ struct xilinx_dma_device { >> struct device *dev; >> struct dma_device common; >> struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; >> - bool has_sg; >> bool mcdma; >> u32 flush_on_fsync; >> bool ext_addr; >> @@ -2324,7 +2323,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, >> >> chan->dev = xdev->dev; >> chan->xdev = xdev; >> - chan->has_sg = xdev->has_sg; >> chan->desc_pendingcount = 0x0; >> chan->ext_addr = xdev->ext_addr; >> >> @@ -2404,6 +2402,13 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, >> else >> chan->start_transfer = xilinx_vdma_start_transfer; >> >> + /* check if SG is enabled */ >> + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & >> + XILINX_DMA_DMASR_SG_MASK) >> + chan->has_sg = true; >> + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, >> + chan->has_sg ? "enabled" : "disabled"); >> + >> /* Initialize the tasklet */ >> tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, >> (unsigned long)chan); >> @@ -2541,7 +2546,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) >> return PTR_ERR(xdev->regs); >> >> /* Retrieve the DMA engine properties from the device tree */ >> - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); > > >> if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) >> xdev->mcdma = of_property_read_bool(node, "xlnx,mcdma"); >> >> -- >> 2.7.4 >> > > -- > ~Vinod -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index a2b8bfa..2897e6d 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -37,9 +37,6 @@ Required properties: Required properties for VDMA: - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. -Optional properties: -- xlnx,include-sg: Tells configured for Scatter-mode in - the hardware. Optional properties for AXI DMA: - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware. Optional properties for VDMA: diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 8288fe4..b99094c 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -86,6 +86,7 @@ #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) +#define XILINX_DMA_DMASR_SG_MASK BIT(3) #define XILINX_DMA_DMASR_IDLE BIT(1) #define XILINX_DMA_DMASR_HALTED BIT(0) #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) @@ -377,7 +378,6 @@ struct xilinx_dma_config { * @dev: Device Structure * @common: DMA device structure * @chan: Driver specific DMA channel - * @has_sg: Specifies whether Scatter-Gather is present or not * @mcdma: Specifies whether Multi-Channel is present or not * @flush_on_fsync: Flush on frame sync * @ext_addr: Indicates 64 bit addressing is supported by dma device @@ -396,7 +396,6 @@ struct xilinx_dma_device { struct device *dev; struct dma_device common; struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; - bool has_sg; bool mcdma; u32 flush_on_fsync; bool ext_addr; @@ -2324,7 +2323,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, chan->dev = xdev->dev; chan->xdev = xdev; - chan->has_sg = xdev->has_sg; chan->desc_pendingcount = 0x0; chan->ext_addr = xdev->ext_addr; @@ -2404,6 +2402,13 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, else chan->start_transfer = xilinx_vdma_start_transfer; + /* check if SG is enabled */ + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & + XILINX_DMA_DMASR_SG_MASK) + chan->has_sg = true; + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, + chan->has_sg ? "enabled" : "disabled"); + /* Initialize the tasklet */ tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, (unsigned long)chan); @@ -2541,7 +2546,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) return PTR_ERR(xdev->regs); /* Retrieve the DMA engine properties from the device tree */ - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) xdev->mcdma = of_property_read_bool(node, "xlnx,mcdma");
The HW can be either direct-access or scatter-gather version. These are SW incompatible. The driver can handle both version: a DT propriety was used to tell the driver whether to assume the HW is is scatter-gather mode. This patch makes the driver to autodetect this information. The DT propriety is not required anymore. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 --- drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++---- 2 files changed, 8 insertions(+), 7 deletions(-)