diff mbox

[v2,4/4] drm/i915/glk: Fix Geminilake scalers mode programming

Message ID 20170223071600.14356-5-ander.conselvan.de.oliveira@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ander Conselvan de Oliveira Feb. 23, 2017, 7:16 a.m. UTC
Geminilake scalers can do 7x7 filtering for all supported input sizes,
so it doesn't need the "high quality" mode programming, which was
actually removed from that platform.

v2: Split dev_priv parameter change out. (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>,
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/intel_atomic.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Ville Syrjälä Feb. 23, 2017, 11:30 a.m. UTC | #1
On Thu, Feb 23, 2017 at 09:16:00AM +0200, Ander Conselvan de Oliveira wrote:
> Geminilake scalers can do 7x7 filtering for all supported input sizes,
> so it doesn't need the "high quality" mode programming, which was
> actually removed from that platform.
> 
> v2: Split dev_priv parameter change out. (Ville)
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>,
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_atomic.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
> index 58916e3..e65818e 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -247,7 +247,9 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
>  		}
>  
>  		/* set scaler mode */
> -		if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
> +		if (IS_GEMINILAKE(dev_priv)) {
> +			scaler_state->scalers[*scaler_id].mode = 0;
> +		} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
>  			/*
>  			 * when only 1 scaler is in use on either pipe A or B,
>  			 * scaler 0 operates in high quality (HQ) mode.
> -- 
> 2.9.3
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
index 58916e3..e65818e 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -247,7 +247,9 @@  int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 		}
 
 		/* set scaler mode */
-		if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
+		if (IS_GEMINILAKE(dev_priv)) {
+			scaler_state->scalers[*scaler_id].mode = 0;
+		} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
 			/*
 			 * when only 1 scaler is in use on either pipe A or B,
 			 * scaler 0 operates in high quality (HQ) mode.