| Message ID | 20170223225357.9572-1-benh@kernel.crashing.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Note: The whole series with the fixed cset comment for patch 11 can be also found there: https://github.com/ozbenh/linux-ast/commits/master Cheers, Ben.
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote: > From: "Y.C. Chen" <yc_chen@aspeedtech.com> > > The current POST code for the AST2300/2400 family doesn't work properly > if the chip hasn't been initialized previously by either the BMC own FW > or the VBIOS. This fixes it. > > Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Joel Stanley <joel@jms.id.au> > --- > drivers/gpu/drm/ast/ast_post.c | 38 +++++++++++++++++++++++++++++++++++--- > 1 file changed, 35 insertions(+), 3 deletions(-) >
Tested-by: Y.C. Chen <yc_chen@aspeedtech.com> -----Original Message----- From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org] Sent: Friday, February 24, 2017 6:54 AM To: dri-devel@lists.freedesktop.org Cc: YC Chen <yc_chen@aspeedtech.com>; airlied@redhat.com; eich@suse.come; linuxppc-dev@ozlabs.org Subject: [PATCH 01/12] drm/ast: Fix AST2400 POST failure without BMC FW or VBIOS From: "Y.C. Chen" <yc_chen@aspeedtech.com> The current POST code for the AST2300/2400 family doesn't work properly if the chip hasn't been initialized previously by either the BMC own FW or the VBIOS. This fixes it. Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 5331ee1..6c5391c 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -1638,12 +1638,44 @@ static void ast_init_dram_2300(struct drm_device *dev) temp |= 0x73; ast_write32(ast, 0x12008, temp); + param.dram_freq = 396; param.dram_type = AST_DDR3; + temp = ast_mindwm(ast, 0x1e6e2070); if (temp & 0x01000000) param.dram_type = AST_DDR2; - param.dram_chipid = ast->dram_type; - param.dram_freq = ast->mclk; - param.vram_size = ast->vram_size; + switch (temp & 0x18000000) { + case 0: + param.dram_chipid = AST_DRAM_512Mx16; + break; + default: + case 0x08000000: + param.dram_chipid = AST_DRAM_1Gx16; + break; + case 0x10000000: + param.dram_chipid = AST_DRAM_2Gx16; + break; + case 0x18000000: + param.dram_chipid = AST_DRAM_4Gx16; + break; + } + switch (temp & 0x0c) { + default: + case 0x00: + param.vram_size = AST_VIDMEM_SIZE_8M; + break; + + case 0x04: + param.vram_size = AST_VIDMEM_SIZE_16M; + break; + + case 0x08: + param.vram_size = AST_VIDMEM_SIZE_32M; + break; + + case 0x0c: + param.vram_size = AST_VIDMEM_SIZE_64M; + break; + } if (param.dram_type == AST_DDR3) { get_ddr3_info(ast, ¶m);