| Message ID | 20170228070026.8725-1-jh80.chung@samsung.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On Tue, Feb 28, 2017 at 04:00:26PM +0900, Jaehoon Chung wrote: > Add pcie-phy node for using phy-exynos-pcie. > > There are some modifications. > 1. Remove the configuration space values in "ranges" property. > - The getting configuration space from ranges is old way. > - Instead, It can be got from "config" > > 2. Use the reg-names as "elbi", "config". > - Can know the purpose of use with reg-names. > > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> > --- > Changelog on V3: > - Split from the patches relevant to pcie > - Modify the commit-message > - Keep the original comment in dt-file > - Send this patch after applying the other patches > > Changelog on V2: > - Removes the child-node > - Fixes the typo > - Removes the unnecessary comments > > arch/arm/boot/dts/exynos5440.dtsi | 30 ++++++++++++++++++++---------- > 1 file changed, 20 insertions(+), 10 deletions(-) > Looks okay. I'll apply it after merge window. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Feb 28, 2017 at 04:00:26PM +0900, Jaehoon Chung wrote: > Add pcie-phy node for using phy-exynos-pcie. > > There are some modifications. > 1. Remove the configuration space values in "ranges" property. > - The getting configuration space from ranges is old way. > - Instead, It can be got from "config" > > 2. Use the reg-names as "elbi", "config". > - Can know the purpose of use with reg-names. > Thanks, applied with changes: 1. Proper subject prefix. Please pay attention to that. 2. Re-write of commit message. There were language errors, mixed up prepositions. Also a "phy-pcie node" cannot be "supported". You can add a node. You cannot support a node. The quality of commit message is important for maintainability of source code because eventually it explains the logic behind the changes in the code. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 2a2e570..a7165b5 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -290,11 +290,22 @@ clock-names = "usbhost"; }; + pcie_phy0: pcie-phy@270000 { + #phy-cells = <0>; + compatible = "samsung,exynos5440-pcie-phy"; + reg = <0x270000 0x1000>, <0x271000 0x40>; + }; + + pcie_phy1: pcie-phy@272000 { + #phy-cells = <0>; + compatible = "samsung,exynos5440-pcie-phy"; + reg = <0x272000 0x1000>, <0x271040 0x40>; + }; + pcie_0: pcie@290000 { compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; - reg = <0x290000 0x1000 - 0x270000 0x1000 - 0x271000 0x40>; + reg = <0x290000 0x1000>, <0x40000000 0x1000>; + reg-names = "elbi", "config"; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; @@ -303,8 +314,8 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ - 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ + phys = <&pcie_phy0>; + ranges = <0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; @@ -315,9 +326,8 @@ pcie_1: pcie@2a0000 { compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; - reg = <0x2a0000 0x1000 - 0x272000 0x1000 - 0x271040 0x40>; + reg = <0x2a0000 0x1000>, <0x60000000 0x1000>; + reg-names = "elbi", "config"; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; @@ -326,8 +336,8 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ - 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ + phys = <&pcie_phy1>; + ranges = <0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>;