| Message ID | 148900646027.27090.10825101032119361281.stgit@brijesh-build-machine (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Mar 08, 2017 at 03:54:20PM -0500, Brijesh Singh wrote: > Fn8000_001f cpuid provides the memory encryption (aka C-bit) location > in a page table for the SEV-enabled guest. > > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > --- > target/i386/cpu.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index fba9212..44662eb 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -40,6 +40,7 @@ > #include "qapi/visitor.h" > #include "qom/qom-qobject.h" > #include "sysemu/arch_init.h" > +#include "sysemu/sev.h" > > #if defined(CONFIG_KVM) > #include <linux/kvm_para.h> > @@ -2966,6 +2967,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > *edx = 0; > } > break; > + case 0x8000001F: > + if (sev_enabled()) { > + host_cpuid(index, 0, eax, ebx, ecx, edx); This doesn't look future-proof. The architecture may be extended to include CPUID bits that we can't expose to the guest unless we implement host-side support for it. I suggest including only the specific bits we know we can really expose to the guest, instead of exposing raw host CPUID directly. Also, exposing only explicitly configured CPUID bits will make it easier to implement migration support in the future. > + } > + break; > case 0xC0000000: > *eax = env->cpuid_xlevel2; > *ebx = 0; >
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fba9212..44662eb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -40,6 +40,7 @@ #include "qapi/visitor.h" #include "qom/qom-qobject.h" #include "sysemu/arch_init.h" +#include "sysemu/sev.h" #if defined(CONFIG_KVM) #include <linux/kvm_para.h> @@ -2966,6 +2967,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *edx = 0; } break; + case 0x8000001F: + if (sev_enabled()) { + host_cpuid(index, 0, eax, ebx, ecx, edx); + } + break; case 0xC0000000: *eax = env->cpuid_xlevel2; *ebx = 0;
Fn8000_001f cpuid provides the memory encryption (aka C-bit) location in a page table for the SEV-enabled guest. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> --- target/i386/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+)