diff mbox

[v4,3/3] clk: vc5: Add support for IDT VersaClock 5P49V5935

Message ID 1491556344-9465-4-git-send-email-alexey_firago@mentor.com (mailing list archive)
State Accepted
Delegated to: Stephen Boyd
Headers show

Commit Message

Alexey Firago April 7, 2017, 9:12 a.m. UTC 
Update IDT VersaClock 5 driver to support 5P49V5935. This chip has
two clock inputs (internal XTAL or external CLKIN), four fractional
dividers (FODs) and five clock outputs (four universal clock outputs
and one reference clock output at OUT0_SELB_I2C).

Current driver supports up to 2 FODs and up to 3 clock outputs. This
patch sets max number of supported FODs to 4 and max number of supported
clock outputs to 5.

Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
---
 drivers/clk/clk-versaclock5.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Marek Vasut April 7, 2017, 7:56 p.m. UTC | #1 
On 04/07/2017 11:12 AM, Alexey Firago wrote:
> Update IDT VersaClock 5 driver to support 5P49V5935. This chip has
> two clock inputs (internal XTAL or external CLKIN), four fractional
> dividers (FODs) and five clock outputs (four universal clock outputs
> and one reference clock output at OUT0_SELB_I2C).
> 
> Current driver supports up to 2 FODs and up to 3 clock outputs. This
> patch sets max number of supported FODs to 4 and max number of supported
> clock outputs to 5.
> 
> Signed-off-by: Alexey Firago <alexey_firago@mentor.com>

Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Stephen Boyd April 19, 2017, 4:09 p.m. UTC | #2 
On 04/07, Alexey Firago wrote:
> Update IDT VersaClock 5 driver to support 5P49V5935. This chip has
> two clock inputs (internal XTAL or external CLKIN), four fractional
> dividers (FODs) and five clock outputs (four universal clock outputs
> and one reference clock output at OUT0_SELB_I2C).
> 
> Current driver supports up to 2 FODs and up to 3 clock outputs. This
> patch sets max number of supported FODs to 4 and max number of supported
> clock outputs to 5.
> 
> Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
> ---

Applied to clk-next
diff mbox

Patch

diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c
index 2b1cc69..ea7d552 100644
--- a/drivers/clk/clk-versaclock5.c
+++ b/drivers/clk/clk-versaclock5.c
@@ -114,10 +114,10 @@ 
 #define VC5_MUX_IN_CLKIN	BIT(1)
 
 /* Maximum number of clk_out supported by this driver */
-#define VC5_MAX_CLK_OUT_NUM	3
+#define VC5_MAX_CLK_OUT_NUM	5
 
 /* Maximum number of FODs supported by this driver */
-#define VC5_MAX_FOD_NUM	2
+#define VC5_MAX_FOD_NUM	4
 
 /* flags to describe chip features */
 /* chip has built-in oscilator */
@@ -127,6 +127,7 @@ 
 enum vc5_model {
 	IDT_VC5_5P49V5923,
 	IDT_VC5_5P49V5933,
+	IDT_VC5_5P49V5935,
 };
 
 /* Structure to describe features of a particular VC5 model */
@@ -594,6 +595,7 @@  static int vc5_map_index_to_output(const enum vc5_model model,
 	case IDT_VC5_5P49V5933:
 		return (n == 0) ? 0 : 3;
 	case IDT_VC5_5P49V5923:
+	case IDT_VC5_5P49V5935:
 	default:
 		return n;
 	}
@@ -790,9 +792,17 @@  static const struct vc5_chip_info idt_5p49v5933_info = {
 	.flags = VC5_HAS_INTERNAL_XTAL,
 };
 
+static const struct vc5_chip_info idt_5p49v5935_info = {
+	.model = IDT_VC5_5P49V5935,
+	.clk_fod_cnt = 4,
+	.clk_out_cnt = 5,
+	.flags = VC5_HAS_INTERNAL_XTAL,
+};
+
 static const struct i2c_device_id vc5_id[] = {
 	{ "5p49v5923", .driver_data = IDT_VC5_5P49V5923 },
 	{ "5p49v5933", .driver_data = IDT_VC5_5P49V5933 },
+	{ "5p49v5935", .driver_data = IDT_VC5_5P49V5935 },
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, vc5_id);
@@ -800,6 +810,7 @@  MODULE_DEVICE_TABLE(i2c, vc5_id);
 static const struct of_device_id clk_vc5_of_match[] = {
 	{ .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info },
 	{ .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info },
+	{ .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, clk_vc5_of_match);