| Message ID | BANLkTinKcb-=m3sURawdEjR=vTt=ApBKaQ@mail.gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jun 30, 2011 at 04:55:07PM +0200, Wolfram Sang wrote: > On Thu, Jun 30, 2011 at 12:13:34PM +0200, Koen Beel wrote: > > Fix clock rate setting on mxs-mmc driver. > > Previously, if div2 was zero the value for TIMING_CLOCK_RATE would > > have been 255 instead of 0. > > Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 > > (TIMING_CLOCK_RATE + 1) where not correctly defined. > > > > Can easily be reproduced on mx23evk: default clock for high speed sdio > > cards is 50 MHz. With a SSP_CLK of 28.8 MHz (default), this resulted in > > an actual clock rate of about 56 kHz. > > > > Signed-off-by: Koen Beel <koen.beel.barco <at> gmail.com> > > Looks promising, but your tabs are garbled (0xa0 0x20 here?) Can you repost a patch which applies? I'd like to test it.
How to increase the number blocks for SD Read operation? Any sysfs entry? -----Original Message----- From: linux-mmc-owner@vger.kernel.org [mailto:linux-mmc-owner@vger.kernel.org] On Behalf Of Wolfram Sang Sent: Friday, July 01, 2011 2:48 PM To: Koen Beel Cc: linux-mmc@vger.kernel.org; shawn.guo@freescale.com Subject: Re: [PATCH] mxs-mmc: fix clock rate setting * PGP Signed by an unknown key On Thu, Jun 30, 2011 at 04:55:07PM +0200, Wolfram Sang wrote: > On Thu, Jun 30, 2011 at 12:13:34PM +0200, Koen Beel wrote: > > Fix clock rate setting on mxs-mmc driver. > > Previously, if div2 was zero the value for TIMING_CLOCK_RATE would > > have been 255 instead of 0. > > Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 > > (TIMING_CLOCK_RATE + 1) where not correctly defined. > > > > Can easily be reproduced on mx23evk: default clock for high speed sdio > > cards is 50 MHz. With a SSP_CLK of 28.8 MHz (default), this resulted in > > an actual clock rate of about 56 kHz. > > > > Signed-off-by: Koen Beel <koen.beel.barco <at> gmail.com> > > Looks promising, but your tabs are garbled (0xa0 0x20 here?) Can you repost a patch which applies? I'd like to test it.
Can read_ahead_kb can be used to increase the number of read blocks? -----Original Message----- From: linux-mmc-owner@vger.kernel.org [mailto:linux-mmc-owner@vger.kernel.org] On Behalf Of Sachin Nikam Sent: Friday, July 01, 2011 5:12 PM To: 'Wolfram Sang'; Koen Beel Cc: linux-mmc@vger.kernel.org; shawn.guo@freescale.com Subject: RE: [PATCH] mxs-mmc: fix clock rate setting How to increase the number blocks for SD Read operation? Any sysfs entry? -----Original Message----- From: linux-mmc-owner@vger.kernel.org [mailto:linux-mmc-owner@vger.kernel.org] On Behalf Of Wolfram Sang Sent: Friday, July 01, 2011 2:48 PM To: Koen Beel Cc: linux-mmc@vger.kernel.org; shawn.guo@freescale.com Subject: Re: [PATCH] mxs-mmc: fix clock rate setting * PGP Signed by an unknown key On Thu, Jun 30, 2011 at 04:55:07PM +0200, Wolfram Sang wrote: > On Thu, Jun 30, 2011 at 12:13:34PM +0200, Koen Beel wrote: > > Fix clock rate setting on mxs-mmc driver. > > Previously, if div2 was zero the value for TIMING_CLOCK_RATE would > > have been 255 instead of 0. > > Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 > > (TIMING_CLOCK_RATE + 1) where not correctly defined. > > > > Can easily be reproduced on mx23evk: default clock for high speed sdio > > cards is 50 MHz. With a SSP_CLK of 28.8 MHz (default), this resulted in > > an actual clock rate of about 56 kHz. > > > > Signed-off-by: Koen Beel <koen.beel.barco <at> gmail.com> > > Looks promising, but your tabs are garbled (0xa0 0x20 here?) Can you repost a patch which applies? I'd like to test it.
On Fri, Jul 01, 2011 at 08:08:48PM +0530, Sachin Nikam wrote:
> Can read_ahead_kb can be used to increase the number of read blocks?
Unless you start a _new thread_ for your question and describe your problem in
a bit more detail, you probably won't get an answer.
Hi Koen, On Thu, Jun 30 2011, Koen Beel wrote: > Fix clock rate setting on mxs-mmc driver. > Previously, if div2 was zero the value for TIMING_CLOCK_RATE would > have been 255 instead of 0. > Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 > (TIMING_CLOCK_RATE + 1) where not correctly defined. > > Can easily be reproduced on mx23evk: default clock for high speed sdio > cards is 50 MHz. With a SSP_CLK of 28.8 MHz (default), this resulted in > an actual clock rate of about 56 kHz. (I'm waiting for a v2 patch of this patch incorporating Wolfram's requested changes before merging it.) Thanks, - Chris.
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 99d39a6..3575330 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -570,22 +570,22 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate) ssp_rate = clk_get_rate(host->clk); - for (div1 = 2; div1 < 254; div1 += 2) { + for (div1 = 2; div1 <= 254; div1 += 2) { div2 = ssp_rate / rate / div1; - if (div2 < 0x100) + if (div2 <= 256) break; } - if (div1 >= 254) { + if (div1 > 254) { dev_err(mmc_dev(host->mmc), "%s: cannot set clock to %d\n", __func__, rate); return; } if (div2 == 0) - bit_rate = ssp_rate / div1; - else - bit_rate = ssp_rate / div1 / div2; + div2 = 1; + + bit_rate = ssp_rate / div1 / div2; val = readl(host->base + HW_SSP_TIMING); val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE); -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Fix clock rate setting on mxs-mmc driver. Previously, if div2 was zero the value for TIMING_CLOCK_RATE would have been 255 instead of 0. Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 (TIMING_CLOCK_RATE + 1) where not correctly defined. Can easily be reproduced on mx23evk: default clock for high speed sdio cards is 50 MHz. With a SSP_CLK of 28.8 MHz (default), this resulted in an actual clock rate of about 56 kHz. Signed-off-by: Koen Beel <koen.beel.barco <at> gmail.com> --- drivers/mmc/host/mxs-mmc.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-)