[v5] fpga manager: Add Altera CvP driver

Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V
and Arria-10 FPGAs via CvP.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
For building this patch requires https://lkml.org/lkml/2017/5/14/73

Changes in v5:

  - use absolute register offset values
  - move register bit macros below offset defines
  - use _MASK and use GENMASK()
  - remove module paramerers, use image flags in fpga_image_info
    struct and add FPGA_MGR_COMPRESSED_BITSTREAM macro. Use sysfs
    file for config error checking flag instead of module parameter.
    Add sysfs driver interface documentation
  - use unsigned int for loop index
  - add comment about dummy value
  - fix single-line comment style
  - use do {} while (cond) loop style
  - factor out status bit polling code and use more suitable
    timeout values, use usleep_range() instead of udelay()
  - use %zu instead of %zi
  - add comment for modulo 4k op in error checking code, use
    more descriptive variable names to make code more readable
  - use 'mask = BIT(bytes * 8) - 1;' for trailing bytes instead
    of switch statement, add comment about trailing bytes
  - add comments about pci config space access and pci memory
    space enabling in ->probe()
  - remove not needed fpga_mgr_get()/fpga_mgr_put() testing code
  - use module_pci_driver() macro

Changes in v4:

  - Update description about supported FPGA models in Kconfig
    and commit log
  - use writel() for iomem accesses
  - factor out dummy write code to altera_cvp_dummy_write()
  - add data register accessor function (iomem and pci config
    space variants) to reduce code

Changes in v3:

  - removed V-series from description (since the driver works
    also with Arria-10). Also renamed functions, config option
    and driver file name. Changed module description in Kconfig
  - dropped 'firmware=' module option (does not allow to bypass
    the fpga framework any more)
  - fixed build warning with newer gcc
  - changed to use hex numbers for PCI bus/device in registered
    fpga manager name. Use more generic fpga manager name (no
    V-series in the name any more)
  - moved steps 16 to 18 from teardown func to write_complete()
    as suggested by Yi
  - rebased on linux-next and tested with Arria-10/Stratix-V
    devices

Changes in v2:

  - rebase for v4.10, change subject ("Stratix V" to "V series")
    and add GPL header
  - use BIT() in register bit macro definitions
  - change .state() to return status or FPGA_MGR_STATE_UNKNOWN
  - use unique name for registered FPGA manager (append "@B:D.F")
  - use PCI_ANY_ID for device ID, users can set custom ID using
    new_id sysfs interface
  - remove map_base/map_len init and use pci_iomap() instead
  - simplify to use pci_read_config_word() instead of
    pci_bus_read_config_word()
  - run fpga_mgr_put() after usage, so the module can be removed
    without unbinding the driver
  - access CVP_STATUS as a 32-bit register, update CVP_STATUS
    bits macros
  - check CONFIG_READY bit in write_init and perform a teardown
    if this bit is set. Move teardown code to separate function
    as suggested
  - change function names to altera_v_*() as we can use
    the driver with other V-series FPGAs. Also change
    the driver file and Kconfig option names accordingly
  - pad written firmware data if the file size is not a multiple of 4
  - when config error checking is enabled, run checks after a 4KiB
    chunk is written
  - remove single built-in firmware string, add module parameter
    to allow setting default firmware for multiple cards as a
    Bus:Device.Function specific strings (optional)
  - remove polling of non-existing data bits DATA_ENC, DATA_COMP.
    Instead, add module parameter for bitstream specific clock to
    data ratio setting

 Documentation/ABI/testing/sysfs-driver-altera-cvp |   8 +
 drivers/fpga/Kconfig                              |   7 +
 drivers/fpga/Makefile                             |   1 +
 drivers/fpga/altera-cvp.c                         | 508 ++++++++++++++++++++++
 4 files changed, 524 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-altera-cvp
 create mode 100644 drivers/fpga/altera-cvp.c

[v5] fpga manager: Add Altera CvP driver

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