| Message ID | 1497973886-26257-2-git-send-email-edgar.iglesias@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jun 20, 2017 at 8:51 AM, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Correct bit shift for the PVR0 version field. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/microblaze/cpu.c | 2 +- > target/microblaze/cpu.h | 2 ++ > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > index 3d58869..af70faa 100644 > --- a/target/microblaze/cpu.c > +++ b/target/microblaze/cpu.c > @@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) > (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | > (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) | > (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | > - (version_code << 16) | > + (version_code << PVR0_VERSION_SHIFT) | > (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0); > > env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > index bf6963b..68c33e8 100644 > --- a/target/microblaze/cpu.h > +++ b/target/microblaze/cpu.h > @@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState; > #define PVR0_USER1_MASK 0x000000FF > #define PVR0_SPROT_MASK 0x00000001 > > +#define PVR0_VERSION_SHIFT 8 > + Hey Edgar, Where do you get 8 from? Looking at: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug984-vivado-microblaze-ref.pdf (page 41) 16 is correct. Thanks, Alistair > /* User 2 PVR mask */ > #define PVR1_USER2_MASK 0xFFFFFFFF > > -- > 2.7.4 > >
On Tue, Jun 20, 2017 at 2:09 PM, Alistair Francis <alistair23@gmail.com> wrote: > On Tue, Jun 20, 2017 at 8:51 AM, Edgar E. Iglesias > <edgar.iglesias@gmail.com> wrote: >> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> >> >> Correct bit shift for the PVR0 version field. >> >> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> >> --- >> target/microblaze/cpu.c | 2 +- >> target/microblaze/cpu.h | 2 ++ >> 2 files changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c >> index 3d58869..af70faa 100644 >> --- a/target/microblaze/cpu.c >> +++ b/target/microblaze/cpu.c >> @@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) >> (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | >> (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) | >> (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | >> - (version_code << 16) | >> + (version_code << PVR0_VERSION_SHIFT) | >> (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0); >> >> env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | >> diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h >> index bf6963b..68c33e8 100644 >> --- a/target/microblaze/cpu.h >> +++ b/target/microblaze/cpu.h >> @@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState; >> #define PVR0_USER1_MASK 0x000000FF >> #define PVR0_SPROT_MASK 0x00000001 >> >> +#define PVR0_VERSION_SHIFT 8 >> + > > Hey Edgar, > > Where do you get 8 from? > > Looking at: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug984-vivado-microblaze-ref.pdf > (page 41) 16 is correct. Woops, got my endianess muddled up there. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Thanks, Alistair > > Thanks, > Alistair > >> /* User 2 PVR mask */ >> #define PVR1_USER2_MASK 0xFFFFFFFF >> >> -- >> 2.7.4 >> >>
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 3d58869..af70faa 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) | (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | - (version_code << 16) | + (version_code << PVR0_VERSION_SHIFT) | (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0); env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index bf6963b..68c33e8 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState; #define PVR0_USER1_MASK 0x000000FF #define PVR0_SPROT_MASK 0x00000001 +#define PVR0_VERSION_SHIFT 8 + /* User 2 PVR mask */ #define PVR1_USER2_MASK 0xFFFFFFFF