diff mbox

drm/i915/guc: Rename GuC irq trigger function

Message ID 20170809172807.31616-1-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michal Wajdeczko Aug. 9, 2017, 5:28 p.m. UTC
We should emphasize that irq trigger function depends on Gen.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Chris Wilson Aug. 9, 2017, 8:55 p.m. UTC | #1
Quoting Michal Wajdeczko (2017-08-09 18:28:07)
> We should emphasize that irq trigger function depends on Gen.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 27e072c..d78ecae 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -94,7 +94,7 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
>                 i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
>  }
>  
> -static void guc_write_irq_trigger(struct intel_guc *guc)
> +static void gen8_guc_trigger_irq(struct intel_guc *guc)
>  {
>         struct drm_i915_private *dev_priv = guc_to_i915(guc);
>  
> @@ -109,7 +109,7 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
>  
>         mutex_init(&guc->send_mutex);
>         guc->send = intel_guc_send_nop;
> -       guc->notify = guc_write_irq_trigger;
> +       guc->notify = gen8_guc_trigger_irq;

My vocab, so I may have this completely backwards,

  irq = pin/wire for asserting the interrupt (hw)

  interrupt = the act of interrupting the CPU

(so we have irq_handlers and interrupt context)

So gen8_guc_trigger_irq is
  - from gen8 onwards
  - interfacing with the guc
  - trigger an irq
It is the last part that causes a bit of confusion for me, I would have
actually gone with guc->notify = gen8_guc_raise_irq or
gen8_guc_send_interrupt.

But definitely trigger_irq is already more meaningful (or at least less
misleading) than write_irq_trigger.
-Chris
Michal Wajdeczko Aug. 9, 2017, 9:12 p.m. UTC | #2
On Wed, Aug 09, 2017 at 09:55:03PM +0100, Chris Wilson wrote:
> Quoting Michal Wajdeczko (2017-08-09 18:28:07)
> > We should emphasize that irq trigger function depends on Gen.
> > 
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_uc.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> > index 27e072c..d78ecae 100644
> > --- a/drivers/gpu/drm/i915/intel_uc.c
> > +++ b/drivers/gpu/drm/i915/intel_uc.c
> > @@ -94,7 +94,7 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
> >                 i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> >  }
> >  
> > -static void guc_write_irq_trigger(struct intel_guc *guc)
> > +static void gen8_guc_trigger_irq(struct intel_guc *guc)
> >  {
> >         struct drm_i915_private *dev_priv = guc_to_i915(guc);
> >  
> > @@ -109,7 +109,7 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
> >  
> >         mutex_init(&guc->send_mutex);
> >         guc->send = intel_guc_send_nop;
> > -       guc->notify = guc_write_irq_trigger;
> > +       guc->notify = gen8_guc_trigger_irq;
> 
> My vocab, so I may have this completely backwards,
> 
>   irq = pin/wire for asserting the interrupt (hw)
> 
>   interrupt = the act of interrupting the CPU
> 
> (so we have irq_handlers and interrupt context)
> 
> So gen8_guc_trigger_irq is
>   - from gen8 onwards
>   - interfacing with the guc
>   - trigger an irq
> It is the last part that causes a bit of confusion for me, I would have
> actually gone with guc->notify = gen8_guc_raise_irq or
> gen8_guc_send_interrupt.

From above proposals I prefer gen8_guc_raise_irq, as
gen8_guc_send_"the act of interrupting the CPU" is also confusing

Thanks,
Michal
 
> 
> But definitely trigger_irq is already more meaningful (or at least less
> misleading) than write_irq_trigger.
> -Chris
Chris Wilson Aug. 12, 2017, 6 p.m. UTC | #3
Quoting Patchwork (2017-08-09 18:46:17)
> == Series Details ==
> 
> Series: drm/i915/guc: Rename GuC irq trigger function
> URL   : https://patchwork.freedesktop.org/series/28570/
> State : success
> 
> == Summary ==
> 
> Series 28570v1 drm/i915/guc: Rename GuC irq trigger function
> https://patchwork.freedesktop.org/api/1.0/series/28570/revisions/1/mbox/
> 
> Test gem_exec_flush:
>         Subgroup basic-batch-kernel-default-uc:
>                 fail       -> PASS       (fi-snb-2600) fdo#100007
> Test kms_pipe_crc_basic:
>         Subgroup suspend-read-crc-pipe-b:
>                 pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705
> 
> fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
> fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

Picked up from pw, r-b'ed and pushed.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 27e072c..d78ecae 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -94,7 +94,7 @@  void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
 		i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
 }
 
-static void guc_write_irq_trigger(struct intel_guc *guc)
+static void gen8_guc_trigger_irq(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
@@ -109,7 +109,7 @@  void intel_uc_init_early(struct drm_i915_private *dev_priv)
 
 	mutex_init(&guc->send_mutex);
 	guc->send = intel_guc_send_nop;
-	guc->notify = guc_write_irq_trigger;
+	guc->notify = gen8_guc_trigger_irq;
 }
 
 static void fetch_uc_fw(struct drm_i915_private *dev_priv,