@@ -6,5 +6,6 @@ obj-$(CONFIG_ARM_32) += omap5.o
obj-$(CONFIG_ARM_32) += rcar2.o
obj-$(CONFIG_ARM_64) += seattle.o
obj-$(CONFIG_ARM_32) += sunxi.o
+obj-$(CONFIG_ARM_64) += sunxi.o
obj-$(CONFIG_ARM_64) += xgene-storm.o
obj-$(CONFIG_ARM_64) += xilinx-zynqmp.o
@@ -22,18 +22,18 @@
#include <asm/io.h>
/* Watchdog constants: */
-#define SUNXI_WDT_BASE 0x01c20c90
+#define SUNXI_WDT_A20_BASE 0x01c20c90
+#define SUNXI_WDT_H5_BASE 0x01c20cA0
#define SUNXI_WDT_MODE 0x04
-#define SUNXI_WDT_MODEADDR (SUNXI_WDT_BASE + SUNXI_WDT_MODE)
#define SUNXI_WDT_MODE_EN (1 << 0)
#define SUNXI_WDT_MODE_RST_EN (1 << 1)
-static void sunxi_reset(void)
+static void sunxi_reset(u32 base)
{
void __iomem *wdt;
- wdt = ioremap_nocache(SUNXI_WDT_MODEADDR & PAGE_MASK, PAGE_SIZE);
+ wdt = ioremap_nocache((base + SUNXI_WDT_MODE) & PAGE_MASK, PAGE_SIZE);
if ( !wdt )
{
dprintk(XENLOG_ERR, "Unable to map watchdog register!\n");
@@ -42,19 +42,35 @@ static void sunxi_reset(void)
/* Enable watchdog to trigger a reset after 500 ms: */
writel(SUNXI_WDT_MODE_EN | SUNXI_WDT_MODE_RST_EN,
- wdt + (SUNXI_WDT_MODEADDR & ~PAGE_MASK));
+ wdt + ((base + SUNXI_WDT_MODE) & ~PAGE_MASK));
iounmap(wdt);
for (;;)
wfi();
}
-static const char * const sunxi_dt_compat[] __initconst =
+static void sunxi_a20_reset(void)
+{
+ sunxi_reset(SUNXI_WDT_A20_BASE);
+}
+
+static void sunxi_h5_reset(void)
+{
+ sunxi_reset(SUNXI_WDT_H5_BASE);
+}
+
+static const char * const sunxi_dt_allwinner_a20_compat[] __initconst =
{
"allwinner,sun7i-a20",
NULL
};
+static const char * const sunxi_dt_allwinner_h5_compat[] __initconst =
+{
+ "allwinner,sun50i-h5",
+ NULL
+};
+
static const struct dt_device_match sunxi_blacklist_dev[] __initconst =
{
/*
@@ -65,10 +81,16 @@ static const struct dt_device_match sunxi_blacklist_dev[] __initconst =
{ /* sentinel */ },
};
-PLATFORM_START(sunxi, "Allwinner A20")
- .compatible = sunxi_dt_compat,
+PLATFORM_START(sunxia20, "Allwinner A20")
+ .compatible = sunxi_dt_allwinner_a20_compat,
+ .blacklist_dev = sunxi_blacklist_dev,
+ .reset = sunxi_a20_reset,
+PLATFORM_END
+
+PLATFORM_START(sunxih5, "Allwinner H5")
+ .compatible = sunxi_dt_allwinner_h5_compat,
.blacklist_dev = sunxi_blacklist_dev,
- .reset = sunxi_reset,
+ .reset = sunxi_h5_reset,
PLATFORM_END
/*
Tested on Orange Pi PC2. Makefile updated to enable ARM64 compilation of sunxi.c. sunxi.c updates include: Added H5 dt compatibility string. Watchdog timer base address is different on sun5oi as compared to sun7i. Reset function updated to handle different base addresses. Signed-off-by: Awais Masood <awais.masood@vadion.com> --- xen/arch/arm/platforms/Makefile | 1 + xen/arch/arm/platforms/sunxi.c | 40 +++++++++++++++++++++++++++++++--------- 2 files changed, 32 insertions(+), 9 deletions(-)