| Message ID | 1505322341-9480-4-git-send-email-chris.paterson2@renesas.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Sep 15, 2017 at 10:11 AM, Simon Horman <horms@verge.net.au> wrote: > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote: >> From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> >> >> Enable the SDHI1 controller on iWave RZ/G1E SoM. >> >> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> >> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> >> --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi >> +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi >> @@ -54,6 +61,16 @@ >> status = "okay"; >> }; >> >> +&sdhi1 { >> + pinctrl-0 = <&sdhi1_pins>; >> + pinctrl-names = "default"; >> + >> + vmmc-supply = <®_3p3v>; >> + vqmmc-supply = <®_3p3v>; >> + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; > > No wp-gpios property means this is a µSD slot, right? Correct. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hello Simon, > From: devicetree-owner@vger.kernel.org [mailto:devicetree- > owner@vger.kernel.org] On Behalf Of Simon Horman > Sent: 15 September 2017 09:12 > To: Chris Paterson <Chris.Paterson2@renesas.com> > > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote: > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > Enable the SDHI1 controller on iWave RZ/G1E SoM. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> > > --- > > This patch is based on renesas-devel-20170913-v4.13. > > > > > > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > index e306e7c..f7f9cef 100644 > > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > @@ -9,6 +9,7 @@ > > */ > > > > #include "r8a7745.dtsi" > > +#include <dt-bindings/gpio/gpio.h> > > > > / { > > compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12 > @@ > > function = "mmc"; > > }; > > > > + sdhi1_pins: sd1 { > > + groups = "sdhi1_data4", "sdhi1_ctrl"; > > + function = "sdhi1"; > > + power-source = <3300>; > > + }; > > + > > i2c3_pins: i2c3 { > > groups = "i2c3_b"; > > function = "i2c3"; > > @@ -54,6 +61,16 @@ > > status = "okay"; > > }; > > > > +&sdhi1 { > > + pinctrl-0 = <&sdhi1_pins>; > > + pinctrl-names = "default"; > > + > > + vmmc-supply = <®_3p3v>; > > + vqmmc-supply = <®_3p3v>; > > + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; > > No wp-gpios property means this is a µSD slot, right? Correct > > Do you have any plans to enable sdr-50 and sdr-104? > Is it not supported for some reason? Nope (unless the hardware changes down the line). Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module. Kind regards, Chris > > I don't mind if its not enabled in this patch but I would like to know if it can be > enabled or not and reflect that information in the wiki. > > http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds > > > + status = "okay"; > > +}; > > + > > &i2c3 { > > pinctrl-0 = <&i2c3_pins>; > > pinctrl-names = "default"; > > -- > > 1.9.1 > > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in the > body of a message to majordomo@vger.kernel.org More majordomo info at > http://vger.kernel.org/majordomo-info.html
> From: Chris Paterson > Sent: 20 September 2017 14:05 > > > > > I don't mind if its not enabled in this patch but I would like to know > > if it can be enabled or not and reflect that information in the wiki. > > > > http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds Will do. Chris
On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote: > Hello Simon, > > > From: devicetree-owner@vger.kernel.org [mailto:devicetree- > > owner@vger.kernel.org] On Behalf Of Simon Horman > > Sent: 15 September 2017 09:12 > > To: Chris Paterson <Chris.Paterson2@renesas.com> > > > > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote: > > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > > > Enable the SDHI1 controller on iWave RZ/G1E SoM. > > > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> > > > --- > > > This patch is based on renesas-devel-20170913-v4.13. > > > > > > > > > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++ > > > 1 file changed, 17 insertions(+) > > > > > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > index e306e7c..f7f9cef 100644 > > > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > @@ -9,6 +9,7 @@ > > > */ > > > > > > #include "r8a7745.dtsi" > > > +#include <dt-bindings/gpio/gpio.h> > > > > > > / { > > > compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12 > > @@ > > > function = "mmc"; > > > }; > > > > > > + sdhi1_pins: sd1 { > > > + groups = "sdhi1_data4", "sdhi1_ctrl"; > > > + function = "sdhi1"; > > > + power-source = <3300>; > > > + }; > > > + > > > i2c3_pins: i2c3 { > > > groups = "i2c3_b"; > > > function = "i2c3"; > > > @@ -54,6 +61,16 @@ > > > status = "okay"; > > > }; > > > > > > +&sdhi1 { > > > + pinctrl-0 = <&sdhi1_pins>; > > > + pinctrl-names = "default"; > > > + > > > + vmmc-supply = <®_3p3v>; > > > + vqmmc-supply = <®_3p3v>; > > > + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; > > > > No wp-gpios property means this is a µSD slot, right? > > Correct > > > > > Do you have any plans to enable sdr-50 and sdr-104? > > Is it not supported for some reason? > > Nope (unless the hardware changes down the line). > Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module. Thanks, got it.
On Wed, Sep 20, 2017 at 01:06:30PM +0000, Chris Paterson wrote: > > > From: Chris Paterson > > Sent: 20 September 2017 14:05 > > > > > > > > > I don't mind if its not enabled in this patch but I would like to know > > > if it can be enabled or not and reflect that information in the wiki. > > > > > > http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds > > Will do. Thanks.
On Thu, Sep 21, 2017 at 10:31:16AM +0200, Simon Horman wrote: > On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote: > > Hello Simon, > > > > > From: devicetree-owner@vger.kernel.org [mailto:devicetree- > > > owner@vger.kernel.org] On Behalf Of Simon Horman > > > Sent: 15 September 2017 09:12 > > > To: Chris Paterson <Chris.Paterson2@renesas.com> > > > > > > On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote: > > > > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > > > > > Enable the SDHI1 controller on iWave RZ/G1E SoM. > > > > > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > > > Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> > > > > --- > > > > This patch is based on renesas-devel-20170913-v4.13. > > > > > > > > > > > > arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++ > > > > 1 file changed, 17 insertions(+) > > > > > > > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > > b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > > index e306e7c..f7f9cef 100644 > > > > --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > > +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi > > > > @@ -9,6 +9,7 @@ > > > > */ > > > > > > > > #include "r8a7745.dtsi" > > > > +#include <dt-bindings/gpio/gpio.h> > > > > > > > > / { > > > > compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12 > > > @@ > > > > function = "mmc"; > > > > }; > > > > > > > > + sdhi1_pins: sd1 { > > > > + groups = "sdhi1_data4", "sdhi1_ctrl"; > > > > + function = "sdhi1"; > > > > + power-source = <3300>; > > > > + }; > > > > + > > > > i2c3_pins: i2c3 { > > > > groups = "i2c3_b"; > > > > function = "i2c3"; > > > > @@ -54,6 +61,16 @@ > > > > status = "okay"; > > > > }; > > > > > > > > +&sdhi1 { > > > > + pinctrl-0 = <&sdhi1_pins>; > > > > + pinctrl-names = "default"; > > > > + > > > > + vmmc-supply = <®_3p3v>; > > > > + vqmmc-supply = <®_3p3v>; > > > > + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; > > > > > > No wp-gpios property means this is a µSD slot, right? > > > > Correct > > > > > > > > Do you have any plans to enable sdr-50 and sdr-104? > > > Is it not supported for some reason? > > > > Nope (unless the hardware changes down the line). > > Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module. > > Thanks, got it. Thanks for the clarification above, I have applied this patch.
diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi index e306e7c..f7f9cef 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -9,6 +9,7 @@ */ #include "r8a7745.dtsi" +#include <dt-bindings/gpio/gpio.h> / { compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12 @@ function = "mmc"; }; + sdhi1_pins: sd1 { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <3300>; + }; + i2c3_pins: i2c3 { groups = "i2c3_b"; function = "i2c3"; @@ -54,6 +61,16 @@ status = "okay"; }; +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default";