diff mbox

[35/48] drm: omapdrm: dsi: Make wait_for_bit_change() return a status

Message ID 20171013145944.26557-36-laurent.pinchart@ideasonboard.com (mailing list archive)
State New, archived
Headers show

Commit Message

Laurent Pinchart Oct. 13, 2017, 2:59 p.m. UTC
The wait_for_bit_change() function returns the value of the bit it
polls. This requires the caller to compare the return value to the
expected bit value. As all the existing callers need is to check whether
the bit has reached the expected value, it's easier to return a boolean
status from the function.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 31 +++++++++++++++----------------
 1 file changed, 15 insertions(+), 16 deletions(-)

Comments

Sebastian Reichel Oct. 17, 2017, 7:12 p.m. UTC | #1
Hi,

On Fri, Oct 13, 2017 at 05:59:31PM +0300, Laurent Pinchart wrote:
> The wait_for_bit_change() function returns the value of the bit it
> polls. This requires the caller to compare the return value to the
> expected bit value. As all the existing callers need is to check whether
> the bit has reached the expected value, it's easier to return a boolean
> status from the function.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>

-- Sebastian

>  drivers/gpu/drm/omapdrm/dss/dsi.c | 31 +++++++++++++++----------------
>  1 file changed, 15 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c
> index 7fb048023fd0..c94bb6404a69 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dsi.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
> @@ -531,7 +531,7 @@ static void dsi_completion_handler(void *data, u32 mask)
>  	complete((struct completion *)data);
>  }
>  
> -static inline int wait_for_bit_change(struct platform_device *dsidev,
> +static inline bool wait_for_bit_change(struct platform_device *dsidev,
>  		const struct dsi_reg idx, int bitnum, int value)
>  {
>  	unsigned long timeout;
> @@ -542,21 +542,21 @@ static inline int wait_for_bit_change(struct platform_device *dsidev,
>  	t = 100;
>  	while (t-- > 0) {
>  		if (REG_GET(dsidev, idx, bitnum, bitnum) == value)
> -			return value;
> +			return true;
>  	}
>  
>  	/* then loop for 500ms, sleeping for 1ms in between */
>  	timeout = jiffies + msecs_to_jiffies(500);
>  	while (time_before(jiffies, timeout)) {
>  		if (REG_GET(dsidev, idx, bitnum, bitnum) == value)
> -			return value;
> +			return true;
>  
>  		wait = ns_to_ktime(1000 * 1000);
>  		set_current_state(TASK_UNINTERRUPTIBLE);
>  		schedule_hrtimeout(&wait, HRTIMER_MODE_REL);
>  	}
>  
> -	return !value;
> +	return false;
>  }
>  
>  static u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
> @@ -1259,9 +1259,9 @@ static inline int dsi_if_enable(struct platform_device *dsidev, bool enable)
>  	enable = enable ? 1 : 0;
>  	REG_FLD_MOD(dsidev, DSI_CTRL, enable, 0, 0); /* IF_EN */
>  
> -	if (wait_for_bit_change(dsidev, DSI_CTRL, 0, enable) != enable) {
> -			DSSERR("Failed to set dsi_if_enable to %d\n", enable);
> -			return -EIO;
> +	if (!wait_for_bit_change(dsidev, DSI_CTRL, 0, enable)) {
> +		DSSERR("Failed to set dsi_if_enable to %d\n", enable);
> +		return -EIO;
>  	}
>  
>  	return 0;
> @@ -1450,7 +1450,7 @@ static int dsi_pll_enable(struct dss_pll *pll)
>  	/* XXX PLL does not come out of reset without this... */
>  	dispc_pck_free_enable(1);
>  
> -	if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 0, 1) != 1) {
> +	if (!wait_for_bit_change(dsidev, DSI_PLL_STATUS, 0, 1)) {
>  		DSSERR("PLL not coming out of reset.\n");
>  		r = -ENODEV;
>  		dispc_pck_free_enable(0);
> @@ -2200,7 +2200,7 @@ static int dsi_cio_init(struct platform_device *dsidev)
>  	 * I/O. */
>  	dsi_read_reg(dsidev, DSI_DSIPHY_CFG5);
>  
> -	if (wait_for_bit_change(dsidev, DSI_DSIPHY_CFG5, 30, 1) != 1) {
> +	if (!wait_for_bit_change(dsidev, DSI_DSIPHY_CFG5, 30, 1)) {
>  		DSSERR("CIO SCP Clock domain not coming out of reset.\n");
>  		r = -EIO;
>  		goto err_scp_clk_dom;
> @@ -2248,7 +2248,7 @@ static int dsi_cio_init(struct platform_device *dsidev)
>  	if (r)
>  		goto err_cio_pwr;
>  
> -	if (wait_for_bit_change(dsidev, DSI_COMPLEXIO_CFG1, 29, 1) != 1) {
> +	if (!wait_for_bit_change(dsidev, DSI_COMPLEXIO_CFG1, 29, 1)) {
>  		DSSERR("CIO PWR clock domain not coming out of reset.\n");
>  		r = -ENODEV;
>  		goto err_cio_pwr_dom;
> @@ -2389,7 +2389,7 @@ static int dsi_force_tx_stop_mode_io(struct platform_device *dsidev)
>  	r = FLD_MOD(r, 1, 15, 15);	/* FORCE_TX_STOP_MODE_IO */
>  	dsi_write_reg(dsidev, DSI_TIMING1, r);
>  
> -	if (wait_for_bit_change(dsidev, DSI_TIMING1, 15, 0) != 0) {
> +	if (!wait_for_bit_change(dsidev, DSI_TIMING1, 15, 0)) {
>  		DSSERR("TX_STOP bit not going down\n");
>  		return -EIO;
>  	}
> @@ -2531,10 +2531,9 @@ static int dsi_vc_enable(struct platform_device *dsidev, int channel,
>  
>  	REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), enable, 0, 0);
>  
> -	if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel),
> -		0, enable) != enable) {
> -			DSSERR("Failed to set dsi_vc_enable to %d\n", enable);
> -			return -EIO;
> +	if (!wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 0, enable)) {
> +		DSSERR("Failed to set dsi_vc_enable to %d\n", enable);
> +		return -EIO;
>  	}
>  
>  	return 0;
> @@ -2586,7 +2585,7 @@ static int dsi_vc_config_source(struct platform_device *dsidev, int channel,
>  	dsi_vc_enable(dsidev, channel, 0);
>  
>  	/* VC_BUSY */
> -	if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 15, 0) != 0) {
> +	if (!wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 15, 0)) {
>  		DSSERR("vc(%d) busy when trying to config for VP\n", channel);
>  		return -EIO;
>  	}
> -- 
> Regards,
> 
> Laurent Pinchart
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff mbox

Patch

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 7fb048023fd0..c94bb6404a69 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -531,7 +531,7 @@  static void dsi_completion_handler(void *data, u32 mask)
 	complete((struct completion *)data);
 }
 
-static inline int wait_for_bit_change(struct platform_device *dsidev,
+static inline bool wait_for_bit_change(struct platform_device *dsidev,
 		const struct dsi_reg idx, int bitnum, int value)
 {
 	unsigned long timeout;
@@ -542,21 +542,21 @@  static inline int wait_for_bit_change(struct platform_device *dsidev,
 	t = 100;
 	while (t-- > 0) {
 		if (REG_GET(dsidev, idx, bitnum, bitnum) == value)
-			return value;
+			return true;
 	}
 
 	/* then loop for 500ms, sleeping for 1ms in between */
 	timeout = jiffies + msecs_to_jiffies(500);
 	while (time_before(jiffies, timeout)) {
 		if (REG_GET(dsidev, idx, bitnum, bitnum) == value)
-			return value;
+			return true;
 
 		wait = ns_to_ktime(1000 * 1000);
 		set_current_state(TASK_UNINTERRUPTIBLE);
 		schedule_hrtimeout(&wait, HRTIMER_MODE_REL);
 	}
 
-	return !value;
+	return false;
 }
 
 static u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
@@ -1259,9 +1259,9 @@  static inline int dsi_if_enable(struct platform_device *dsidev, bool enable)
 	enable = enable ? 1 : 0;
 	REG_FLD_MOD(dsidev, DSI_CTRL, enable, 0, 0); /* IF_EN */
 
-	if (wait_for_bit_change(dsidev, DSI_CTRL, 0, enable) != enable) {
-			DSSERR("Failed to set dsi_if_enable to %d\n", enable);
-			return -EIO;
+	if (!wait_for_bit_change(dsidev, DSI_CTRL, 0, enable)) {
+		DSSERR("Failed to set dsi_if_enable to %d\n", enable);
+		return -EIO;
 	}
 
 	return 0;
@@ -1450,7 +1450,7 @@  static int dsi_pll_enable(struct dss_pll *pll)
 	/* XXX PLL does not come out of reset without this... */
 	dispc_pck_free_enable(1);
 
-	if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 0, 1) != 1) {
+	if (!wait_for_bit_change(dsidev, DSI_PLL_STATUS, 0, 1)) {
 		DSSERR("PLL not coming out of reset.\n");
 		r = -ENODEV;
 		dispc_pck_free_enable(0);
@@ -2200,7 +2200,7 @@  static int dsi_cio_init(struct platform_device *dsidev)
 	 * I/O. */
 	dsi_read_reg(dsidev, DSI_DSIPHY_CFG5);
 
-	if (wait_for_bit_change(dsidev, DSI_DSIPHY_CFG5, 30, 1) != 1) {
+	if (!wait_for_bit_change(dsidev, DSI_DSIPHY_CFG5, 30, 1)) {
 		DSSERR("CIO SCP Clock domain not coming out of reset.\n");
 		r = -EIO;
 		goto err_scp_clk_dom;
@@ -2248,7 +2248,7 @@  static int dsi_cio_init(struct platform_device *dsidev)
 	if (r)
 		goto err_cio_pwr;
 
-	if (wait_for_bit_change(dsidev, DSI_COMPLEXIO_CFG1, 29, 1) != 1) {
+	if (!wait_for_bit_change(dsidev, DSI_COMPLEXIO_CFG1, 29, 1)) {
 		DSSERR("CIO PWR clock domain not coming out of reset.\n");
 		r = -ENODEV;
 		goto err_cio_pwr_dom;
@@ -2389,7 +2389,7 @@  static int dsi_force_tx_stop_mode_io(struct platform_device *dsidev)
 	r = FLD_MOD(r, 1, 15, 15);	/* FORCE_TX_STOP_MODE_IO */
 	dsi_write_reg(dsidev, DSI_TIMING1, r);
 
-	if (wait_for_bit_change(dsidev, DSI_TIMING1, 15, 0) != 0) {
+	if (!wait_for_bit_change(dsidev, DSI_TIMING1, 15, 0)) {
 		DSSERR("TX_STOP bit not going down\n");
 		return -EIO;
 	}
@@ -2531,10 +2531,9 @@  static int dsi_vc_enable(struct platform_device *dsidev, int channel,
 
 	REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), enable, 0, 0);
 
-	if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel),
-		0, enable) != enable) {
-			DSSERR("Failed to set dsi_vc_enable to %d\n", enable);
-			return -EIO;
+	if (!wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 0, enable)) {
+		DSSERR("Failed to set dsi_vc_enable to %d\n", enable);
+		return -EIO;
 	}
 
 	return 0;
@@ -2586,7 +2585,7 @@  static int dsi_vc_config_source(struct platform_device *dsidev, int channel,
 	dsi_vc_enable(dsidev, channel, 0);
 
 	/* VC_BUSY */
-	if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 15, 0) != 0) {
+	if (!wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 15, 0)) {
 		DSSERR("vc(%d) busy when trying to config for VP\n", channel);
 		return -EIO;
 	}