| Message ID | 20170830151953.30856-15-tony@atomide.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 30, 2017 at 08:19:50AM -0700, Tony Lindgren wrote: > On omap4 we're missing the PowerVR SGX GPU node with it's related > "ti,hwmods" property that the SoC interconnect code needs. > > Note that this will only show up as a bug with "doesn't have > mpu register target base" boot errors when the legacy platform > data is removed. > > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> > Signed-off-by: Tony Lindgren <tony@atomide.com> > --- > .../devicetree/bindings/gpu/ti-powervr-sgx.txt | 39 ++++++++++++++++++++++ While the compatible strings should be TI specific, the doc shouldn't be. > arch/arm/boot/dts/omap4.dtsi | 7 ++++ > 2 files changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Sep 11, 2017 at 4:50 PM, Rob Herring <robh@kernel.org> wrote: > On Wed, Aug 30, 2017 at 08:19:50AM -0700, Tony Lindgren wrote: >> On omap4 we're missing the PowerVR SGX GPU node with it's related >> "ti,hwmods" property that the SoC interconnect code needs. >> >> Note that this will only show up as a bug with "doesn't have >> mpu register target base" boot errors when the legacy platform >> data is removed. >> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> >> Signed-off-by: Tony Lindgren <tony@atomide.com> >> --- Out of curiosity, is anything being done with this? I'm really interested to see the PVR working in a modern kernel. I'd like to help more, but I am afraid I don't fully understand the interconnects and how the driver componenets interact with the omap processor. Please let me know if there are sub-tasks that I can assist. adam >> .../devicetree/bindings/gpu/ti-powervr-sgx.txt | 39 ++++++++++++++++++++++ > > While the compatible strings should be TI specific, the doc shouldn't > be. > >> arch/arm/boot/dts/omap4.dtsi | 7 ++++ >> 2 files changed, 46 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
* Adam Ford <aford173@gmail.com> [171202 00:20]: > On Mon, Sep 11, 2017 at 4:50 PM, Rob Herring <robh@kernel.org> wrote: > > On Wed, Aug 30, 2017 at 08:19:50AM -0700, Tony Lindgren wrote: > >> On omap4 we're missing the PowerVR SGX GPU node with it's related > >> "ti,hwmods" property that the SoC interconnect code needs. > >> > >> Note that this will only show up as a bug with "doesn't have > >> mpu register target base" boot errors when the legacy platform > >> data is removed. > >> > >> Cc: Mark Rutland <mark.rutland@arm.com> > >> Cc: Rob Herring <robh+dt@kernel.org> > >> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> > >> Signed-off-by: Tony Lindgren <tony@atomide.com> > >> --- > > Out of curiosity, is anything being done with this? I'm really > interested to see the PVR working in a modern kernel. I'd like to > help more, but I am afraid I don't fully understand the interconnects > and how the driver componenets interact with the omap processor. > > Please let me know if there are sub-tasks that I can assist. Well the powervr node should use a powervr generic binding that does not yet exist. I think the TI tree binding could be easily modified for a generic binding. So first doing a binding patch for powervr and Cc dt list and SoC maintainers with powervr on them would help. And then eventually the powervr generic node should be a child node under the "target-module" node in the dtsi file. See what we have for gpu target-module@56000000 in omap4.dtsi. Note that the interconnect target module does not yet work for omap3 as the clocks are different. I'll be posting patches for the clocks over next few weeks. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt new file mode 100644 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt @@ -0,0 +1,39 @@ +Texas Instruments PowevVR SGX binding + +SGX can be used for graphics acceleration on Texas Instruments SoCs. + +Note that the SGX binding is currently only used by the SoC interconnect +code to idle the module on init and no open source driver is available +for SGX. The PowerVR model specific driver nodes should be child nodes +of this instance, and a clock binding may need to be added. + +Required properties: + +compatible: Shall be one of the following: + "ti,omap3-sgx530" + "ti,am335-sgx530" + "ti,omap4-sgx540" + "ti,omap5-sgx544" + "ti,dra7-sgx544" + +reg: Shall contain the device instance IO range + +interrupts: Shall contain the device instance interrupt + + +Optional properties: + +reg-names: Shall contain the IO range names if multiple IO + ranges are used by the SoC + +ti,hwmods: Shall contain the TI interconnect module name if needed + by the SoC + + +Example: + gpu: gpu@56000000 { + compatible = "ti,omap4-sgx540"; + reg = <0x56000000 0x10000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "gpu"; + }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -1111,6 +1111,13 @@ status = "disabled"; }; + gpu: gpu@56000000 { + compatible = "ti,omap4-sgx540"; + reg = <0x56000000 0x10000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "gpu"; + }; + dss: dss@58000000 { compatible = "ti,omap4-dss"; reg = <0x58000000 0x80>;
On omap4 we're missing the PowerVR SGX GPU node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- .../devicetree/bindings/gpu/ti-powervr-sgx.txt | 39 ++++++++++++++++++++++ arch/arm/boot/dts/omap4.dtsi | 7 ++++ 2 files changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt