Message ID | 1512582664-24936-1-git-send-email-jagan@amarulasolutions.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote: > usb otg on bananapi-m64 has configured with USB-ID with PH9 > and USB-DRVVBUS attached with dcdc1 regulatort. That is not how you read the schematic... Intersecting lines that are tied together will have a dot representing the connection. The DCDC1 line is a pull-up for the ID pin. This is very clear because it has a resistor connected in series. VBUS for OTG is controlled by the IC displayed to the right in the schematic, which is powered from 5V, and controlled by the DRVVBUS pin from the PMIC. Please take a look at how the A31/A33/A83T board dts files represent this. ChenYu
On Thu, Dec 7, 2017 at 8:54 AM, Chen-Yu Tsai <wens@csie.org> wrote: > On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >> usb otg on bananapi-m64 has configured with USB-ID with PH9 >> and USB-DRVVBUS attached with dcdc1 regulatort. > > That is not how you read the schematic... > > Intersecting lines that are tied together will have a dot representing > the connection. The DCDC1 line is a pull-up for the ID pin. This is very > clear because it has a resistor connected in series. > > VBUS for OTG is controlled by the IC displayed to the right in the > schematic, which is powered from 5V, and controlled by the DRVVBUS > pin from the PMIC. Please take a look at how the A31/A33/A83T board > dts files represent this. This is where I confused, USB-DRVVBUS is connected to pin 51 of PMIC if we add 5v regulator how can configure gpio number for this? I saw sun8i-a33-olinuxino.dts which is also similar but it has gpio = <&pio 1 9 GPIO_ACTIVE_HIGH>; thanks!
On Thu, Dec 7, 2017 at 2:18 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: > On Thu, Dec 7, 2017 at 8:54 AM, Chen-Yu Tsai <wens@csie.org> wrote: >> On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >>> usb otg on bananapi-m64 has configured with USB-ID with PH9 >>> and USB-DRVVBUS attached with dcdc1 regulatort. >> >> That is not how you read the schematic... >> >> Intersecting lines that are tied together will have a dot representing >> the connection. The DCDC1 line is a pull-up for the ID pin. This is very >> clear because it has a resistor connected in series. >> >> VBUS for OTG is controlled by the IC displayed to the right in the >> schematic, which is powered from 5V, and controlled by the DRVVBUS >> pin from the PMIC. Please take a look at how the A31/A33/A83T board >> dts files represent this. > > This is where I confused, USB-DRVVBUS is connected to pin 51 of PMIC > if we add 5v regulator how can configure gpio number for this? I saw From the axp20x bindings: - x-powers,drive-vbus-en: boolean, set this when the N_VBUSEN pin is used as an output pin to control an external regulator to drive the OTG VBus, rather then as an input pin which signals whether the board is driving OTG VBus or not. (axp221 / axp223 / axp813 only) Setting this allows you to use the "drivevbus" regulator under the PMIC. As I said, look at how other boards are doing it. > sun8i-a33-olinuxino.dts which is also similar but it has gpio = <&pio > 1 9 GPIO_ACTIVE_HIGH>; I have no idea where you saw this. It does not exist in my tree. Why don't you just trace backwards from the usb0_vbus-supply property under the usbphy node, and see where it all leads. ChenYu
On Thu, Dec 7, 2017 at 2:54 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: > On Thu, Dec 7, 2017 at 11:56 AM, Chen-Yu Tsai <wens@csie.org> wrote: >> On Thu, Dec 7, 2017 at 2:18 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >>> On Thu, Dec 7, 2017 at 8:54 AM, Chen-Yu Tsai <wens@csie.org> wrote: >>>> On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >>>>> usb otg on bananapi-m64 has configured with USB-ID with PH9 >>>>> and USB-DRVVBUS attached with dcdc1 regulatort. >>>> >>>> That is not how you read the schematic... >>>> >>>> Intersecting lines that are tied together will have a dot representing >>>> the connection. The DCDC1 line is a pull-up for the ID pin. This is very >>>> clear because it has a resistor connected in series. >>>> >>>> VBUS for OTG is controlled by the IC displayed to the right in the >>>> schematic, which is powered from 5V, and controlled by the DRVVBUS >>>> pin from the PMIC. Please take a look at how the A31/A33/A83T board >>>> dts files represent this. >>> >>> This is where I confused, USB-DRVVBUS is connected to pin 51 of PMIC >>> if we add 5v regulator how can configure gpio number for this? I saw >> >> From the axp20x bindings: >> >> - x-powers,drive-vbus-en: boolean, set this when the N_VBUSEN pin is >> used as an output pin to control an external >> regulator to drive the OTG VBus, rather then >> as an input pin which signals whether the >> board is driving OTG VBus or not. >> (axp221 / axp223 / axp813 only) >> >> Setting this allows you to use the "drivevbus" regulator under the PMIC. >> As I said, look at how other boards are doing it. >> >>> sun8i-a33-olinuxino.dts which is also similar but it has gpio = <&pio >>> 1 9 GPIO_ACTIVE_HIGH>; >> >> I have no idea where you saw this. It does not exist in my tree. >> >> Why don't you just trace backwards from the usb0_vbus-supply property >> under the usbphy node, and see where it all leads. > > This what exactly I did, usb0_vbus-supply = <®_drivevbus>; on This is not what you did in your patch. > sun8i-a33-olinuxino.dts is using usb0-vbus from > sunxi-common-regulators.dtsi. reg_usb0_vbus regulator using gpio9 > which I couldn't find it on schematics. And I'm telling you that in mainline a33-olinuxino.dts it is: usb0_vbus-supply = <®_drivevbus>; It has been that way since the initial commit adding the file. What tree are you looking at exactly? Take a good look at everything, including your patch, and stop arguing. ChenYu
On Thu, Dec 7, 2017 at 12:31 PM, Chen-Yu Tsai <wens@csie.org> wrote: > On Thu, Dec 7, 2017 at 2:54 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >> On Thu, Dec 7, 2017 at 11:56 AM, Chen-Yu Tsai <wens@csie.org> wrote: >>> On Thu, Dec 7, 2017 at 2:18 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >>>> On Thu, Dec 7, 2017 at 8:54 AM, Chen-Yu Tsai <wens@csie.org> wrote: >>>>> On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >>>>>> usb otg on bananapi-m64 has configured with USB-ID with PH9 >>>>>> and USB-DRVVBUS attached with dcdc1 regulatort. >>>>> >>>>> That is not how you read the schematic... >>>>> >>>>> Intersecting lines that are tied together will have a dot representing >>>>> the connection. The DCDC1 line is a pull-up for the ID pin. This is very >>>>> clear because it has a resistor connected in series. >>>>> >>>>> VBUS for OTG is controlled by the IC displayed to the right in the >>>>> schematic, which is powered from 5V, and controlled by the DRVVBUS >>>>> pin from the PMIC. Please take a look at how the A31/A33/A83T board >>>>> dts files represent this. >>>> >>>> This is where I confused, USB-DRVVBUS is connected to pin 51 of PMIC >>>> if we add 5v regulator how can configure gpio number for this? I saw >>> >>> From the axp20x bindings: >>> >>> - x-powers,drive-vbus-en: boolean, set this when the N_VBUSEN pin is >>> used as an output pin to control an external >>> regulator to drive the OTG VBus, rather then >>> as an input pin which signals whether the >>> board is driving OTG VBus or not. >>> (axp221 / axp223 / axp813 only) >>> >>> Setting this allows you to use the "drivevbus" regulator under the PMIC. >>> As I said, look at how other boards are doing it. >>> >>>> sun8i-a33-olinuxino.dts which is also similar but it has gpio = <&pio >>>> 1 9 GPIO_ACTIVE_HIGH>; >>> >>> I have no idea where you saw this. It does not exist in my tree. >>> >>> Why don't you just trace backwards from the usb0_vbus-supply property >>> under the usbphy node, and see where it all leads. >> >> This what exactly I did, usb0_vbus-supply = <®_drivevbus>; on > > This is not what you did in your patch. > >> sun8i-a33-olinuxino.dts is using usb0-vbus from >> sunxi-common-regulators.dtsi. reg_usb0_vbus regulator using gpio9 >> which I couldn't find it on schematics. > > And I'm telling you that in mainline a33-olinuxino.dts it is: > > usb0_vbus-supply = <®_drivevbus>; > > It has been that way since the initial commit adding the file. > What tree are you looking at exactly? Take a good look at everything, > including your patch, and stop arguing. Sorry, you miss understand. I've seen a33-olinuxino and bananapi-m64 has similar connection in otg. Just trying to compare both and understand what I did different in my patch. Anyway thanks for your time I will send next version it will be worth discussing the same there. thanks!
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts index 4a8d3f8..0c74d62 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts @@ -66,6 +66,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -136,6 +140,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; @@ -259,6 +267,13 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + usb0_vbus-supply = <®_dcdc1>; status = "okay"; };
usb otg on bananapi-m64 has configured with USB-ID with PH9 and USB-DRVVBUS attached with dcdc1 regulatort. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)