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[1/5] arm: dts: sun8i: a83t: Add I2C0 node

Message ID 20171208215419.30396-2-mylene.josserand@free-electrons.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mylene JOSSERAND Dec. 8, 2017, 9:54 p.m. UTC
Add I2C0 node for A83T.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Maxime Ripard Dec. 11, 2017, 7:15 a.m. UTC | #1
Hi,

On Fri, Dec 08, 2017 at 10:54:15PM +0100, Mylène Josserand wrote:
> Add I2C0 node for A83T.
> 
> Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 19acae1b4089..848cf3f19962 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -177,6 +177,17 @@
>  			#dma-cells = <1>;
>  		};
>  
> +		i2c0: i2c@01c2ac00 {

Drop the leading 0, it generates a warning in dtc.

> +			compatible = "allwinner,sun6i-a31-i2c";

Can you add a SoC-specific compatible there please?

> +			reg = <0x01c2ac00 0x400>;

And you should order your nodes by physical address.

Thanks!
Maxime
Chen-Yu Tsai Dec. 11, 2017, 8:31 a.m. UTC | #2
On Mon, Dec 11, 2017 at 3:15 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> On Fri, Dec 08, 2017 at 10:54:15PM +0100, Mylène Josserand wrote:
>> Add I2C0 node for A83T.
>>
>> Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
>> ---
>>  arch/arm/boot/dts/sun8i-a83t.dtsi | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> index 19acae1b4089..848cf3f19962 100644
>> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> @@ -177,6 +177,17 @@
>>                       #dma-cells = <1>;
>>               };
>>
>> +             i2c0: i2c@01c2ac00 {
>
> Drop the leading 0, it generates a warning in dtc.
>
>> +                     compatible = "allwinner,sun6i-a31-i2c";
>
> Can you add a SoC-specific compatible there please?
>
>> +                     reg = <0x01c2ac00 0x400>;
>
> And you should order your nodes by physical address.

I have a similar patch in my A83T I2S branch:

https://github.com/wens/linux/commit/8b76a3e555b39a06f3f8182e4ff5645de4c4cbc3

ChenYu
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..848cf3f19962 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -177,6 +177,17 @@ 
 			#dma-cells = <1>;
 		};
 
+		i2c0: i2c@01c2ac00 {
+			compatible = "allwinner,sun6i-a31-i2c";
+			reg = <0x01c2ac00 0x400>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C0>;
+			resets = <&ccu RST_BUS_I2C0>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun8i-a83t-mmc",
 				     "allwinner,sun7i-a20-mmc";