Message ID | 20171219105116.24335-1-peter.ujfalusi@ti.com (mailing list archive) |
---|---|
State | Accepted |
Headers | show |
On Tue, Dec 19, 2017 at 12:51:16PM +0200, Peter Ujfalusi wrote: > From: Vignesh R <vigneshr@ti.com> > > Register layout of a typical TPCC_EVT_MUX_M_N register is such that the > lowest numbered event is at the lowest byte address and highest numbered > event at highest byte address. But TPCC_EVT_MUX_60_63 register layout is > different, in that the lowest numbered event is at the highest address > and highest numbered event is at the lowest address. Therefore, modify > ti_am335x_xbar_write() to handle TPCC_EVT_MUX_60_63 register > accordingly. Applied, thanks
diff --git a/drivers/dma/ti-dma-crossbar.c b/drivers/dma/ti-dma-crossbar.c index 7df910e7c348..9272b173c746 100644 --- a/drivers/dma/ti-dma-crossbar.c +++ b/drivers/dma/ti-dma-crossbar.c @@ -54,7 +54,15 @@ struct ti_am335x_xbar_map { static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val) { - writeb_relaxed(val, iomem + event); + /* + * TPCC_EVT_MUX_60_63 register layout is different than the + * rest, in the sense, that event 63 is mapped to lowest byte + * and event 60 is mapped to highest, handle it separately. + */ + if (event >= 60 && event <= 63) + writeb_relaxed(val, iomem + (63 - event % 4)); + else + writeb_relaxed(val, iomem + event); } static void ti_am335x_xbar_free(struct device *dev, void *route_data)