| Message ID | 20180110215348.315-3-david@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10.01.2018 22:53, David Hildenbrand wrote: > Without the UL, we get 32 bit addresses, resulting in different memory > addresses. This is necessary for enabling the MMU. > > Signed-off-by: David Hildenbrand <david@redhat.com> > --- > s390x/intercept.c | 10 +++++----- > s390x/selftest.c | 2 +- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/s390x/intercept.c b/s390x/intercept.c > index 99dde0d..b6027b2 100644 > --- a/s390x/intercept.c > +++ b/s390x/intercept.c > @@ -46,7 +46,7 @@ static void test_stpx(void) > check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); > > expect_pgm_int(); > - asm volatile(" stpx 0(%0) " : : "r"(-8)); > + asm volatile(" stpx 0(%0) " : : "r"(-8UL)); I think I'd slightly prefer just "L" as suffix instead of "UL" ... in practice, I guess it does not matter here though, so: Reviewed-by: Thomas Huth <thuth@redhat.com>
On 11.01.2018 09:57, Thomas Huth wrote: > On 10.01.2018 22:53, David Hildenbrand wrote: >> Without the UL, we get 32 bit addresses, resulting in different memory >> addresses. This is necessary for enabling the MMU. >> >> Signed-off-by: David Hildenbrand <david@redhat.com> >> --- >> s390x/intercept.c | 10 +++++----- >> s390x/selftest.c | 2 +- >> 2 files changed, 6 insertions(+), 6 deletions(-) >> >> diff --git a/s390x/intercept.c b/s390x/intercept.c >> index 99dde0d..b6027b2 100644 >> --- a/s390x/intercept.c >> +++ b/s390x/intercept.c >> @@ -46,7 +46,7 @@ static void test_stpx(void) >> check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); >> >> expect_pgm_int(); >> - asm volatile(" stpx 0(%0) " : : "r"(-8)); >> + asm volatile(" stpx 0(%0) " : : "r"(-8UL)); > > I think I'd slightly prefer just "L" as suffix instead of "UL" ... in > practice, I guess it does not matter here though, so: > > Reviewed-by: Thomas Huth <thuth@redhat.com> > Will change, thanks!
diff --git a/s390x/intercept.c b/s390x/intercept.c index 99dde0d..b6027b2 100644 --- a/s390x/intercept.c +++ b/s390x/intercept.c @@ -46,7 +46,7 @@ static void test_stpx(void) check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); expect_pgm_int(); - asm volatile(" stpx 0(%0) " : : "r"(-8)); + asm volatile(" stpx 0(%0) " : : "r"(-8UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } @@ -78,7 +78,7 @@ static void test_spx(void) check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); expect_pgm_int(); - asm volatile(" spx 0(%0) " : : "r"(-8)); + asm volatile(" spx 0(%0) " : : "r"(-8UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } @@ -101,7 +101,7 @@ static void test_stap(void) check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); expect_pgm_int(); - asm volatile ("stap 0(%0)\n" : : "r"(-8)); + asm volatile ("stap 0(%0)\n" : : "r"(-8UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } @@ -126,7 +126,7 @@ static void test_stidp(void) check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); expect_pgm_int(); - asm volatile ("stidp 0(%0)\n" : : "r"(-8)); + asm volatile ("stidp 0(%0)\n" : : "r"(-8UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } @@ -155,7 +155,7 @@ static void test_testblock(void) check_pgm_int_code(PGM_INT_CODE_PROTECTION); expect_pgm_int(); - asm volatile (" .insn rre,0xb22c0000,0,%0\n" : : "r"(-4096)); + asm volatile (" .insn rre,0xb22c0000,0,%0\n" : : "r"(-4096UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); } diff --git a/s390x/selftest.c b/s390x/selftest.c index 1c8d16a..76ed4bf 100644 --- a/s390x/selftest.c +++ b/s390x/selftest.c @@ -33,7 +33,7 @@ static void test_pgm_int(void) check_pgm_int_code(PGM_INT_CODE_OPERATION); expect_pgm_int(); - asm volatile(" stg %0,0(%0)\n" : : "r"(-1)); + asm volatile(" stg %0,0(%0)\n" : : "r"(-1UL)); check_pgm_int_code(PGM_INT_CODE_ADDRESSING); }
Without the UL, we get 32 bit addresses, resulting in different memory addresses. This is necessary for enabling the MMU. Signed-off-by: David Hildenbrand <david@redhat.com> --- s390x/intercept.c | 10 +++++----- s390x/selftest.c | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-)