| Message ID | 20180228171844.20006-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 28/02/18 09:18, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > In decimal its just a weird big number, while in hex can actually log > which engines were requested to be wedged. > And IGT is not reading the hang reason in this case, so Reviewed-by: Michel Thierry <michel.thierry@intel.com> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 472240349388..2a4c258b90fd 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -3977,7 +3977,8 @@ i915_wedged_set(void *data, u64 val) > engine->hangcheck.stalled = true; > } > > - i915_handle_error(i915, val, "Manually setting wedged to %llu", val); > + i915_handle_error(i915, val, "Manually set wedged engine mask = %llx", > + val); > > wait_on_bit(&i915->gpu_error.flags, > I915_RESET_HANDOFF, >
Quoting Tvrtko Ursulin (2018-02-28 17:18:44) > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > In decimal its just a weird big number, while in hex can actually log > which engines were requested to be wedged. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Oh, and another thing that bugs me, is "action: reset". That's all we say, and I think it's immaterial to the post-mortem error state. Just creates extra work for me in removing that useless bit of information when it gets cut and pasted into bug reports. -Chris
On 28/02/2018 17:54, Patchwork wrote: > == Series Details == > > Series: drm/i915: Wedged engine mask makes more sense in hex > URL : https://patchwork.freedesktop.org/series/39147/ > State : success > > == Summary == > > Series 39147v1 drm/i915: Wedged engine mask makes more sense in hex > https://patchwork.freedesktop.org/api/1.0/series/39147/revisions/1/mbox/ > > ---- Known issues: > > Test kms_pipe_crc_basic: > Subgroup suspend-read-crc-pipe-b: > pass -> INCOMPLETE (fi-skl-guc) fdo#103191 > > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > > fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:415s > fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:376s > fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:492s > fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:285s > fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:479s > fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:489s > fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:469s > fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:464s > fi-cfl-8700k total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:396s > fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:559s > fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:590s > fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:416s > fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:286s > fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:505s > fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:388s > fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:410s > fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:457s > fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:411s > fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:457s > fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:489s > fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:453s > fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:492s > fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:591s > fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:430s > fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:501s > fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:518s > fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:492s > fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:475s > fi-skl-guc total:245 pass:220 dwarn:0 dfail:0 fail:0 skip:24 > fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:431s > fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:529s > fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:393s > > 573e919160e546baa4268a213400f9f42f72ae97 drm-tip: 2018y-02m-28d-16h-17m-37s UTC integration manifest > a1a2ccdff789 drm/i915: Wedged engine mask makes more sense in hex Pushed, thanks for the reviews! Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 472240349388..2a4c258b90fd 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3977,7 +3977,8 @@ i915_wedged_set(void *data, u64 val) engine->hangcheck.stalled = true; } - i915_handle_error(i915, val, "Manually setting wedged to %llu", val); + i915_handle_error(i915, val, "Manually set wedged engine mask = %llx", + val); wait_on_bit(&i915->gpu_error.flags, I915_RESET_HANDOFF,