diff mbox

[1/4] pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions

Message ID 1518696091-23561-2-git-send-email-ulrich.hecht+renesas@gmail.com (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show

Commit Message

Ulrich Hecht Feb. 15, 2018, 12:01 p.m. UTC 
This patch adds VIN4 and VIN5 pins, groups and functions for the
R8A7796 SoC.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 454 +++++++++++++++++++++++++++++++++++
 1 file changed, 454 insertions(+)

Comments

Geert Uytterhoeven Feb. 20, 2018, 1:58 p.m. UTC | #1 
Hi Uli,

On Thu, Feb 15, 2018 at 1:01 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> This patch adds VIN4 and VIN5 pins, groups and functions for the
> R8A7796 SoC.
>
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

However, I guess you can use union vin_data and VIN_DATA_PIN_GROUP() to
reduce duplication, like on R-Car Gen2?

Would there be a use case for vin4_data4 and vin5_data4, or is that
mode only supported on R-Car H2?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Ulrich Hecht Feb. 26, 2018, 9:02 a.m. UTC | #2 
On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Would there be a use case for vin4_data4 and vin5_data4, or is that
> mode only supported on R-Car H2?

The docs don't mention it, so I would assume it's not supported.

CU
Uli
Geert Uytterhoeven Feb. 26, 2018, 9:21 a.m. UTC | #3 
Hi Ulrich,

On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> Would there be a use case for vin4_data4 and vin5_data4, or is that
>> mode only supported on R-Car H2?
>
> The docs don't mention it, so I would assume it's not supported.

Thank you, queuing (also for r8a7795 and r8a77995) in sh-pfc-for-v4.17.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Geert Uytterhoeven Feb. 26, 2018, 10:18 a.m. UTC | #4 
Hi Uli,

On Mon, Feb 26, 2018 at 10:21 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
>> On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven
>> <geert@linux-m68k.org> wrote:
>>> Would there be a use case for vin4_data4 and vin5_data4, or is that
>>> mode only supported on R-Car H2?
>>
>> The docs don't mention it, so I would assume it's not supported.
>
> Thank you, queuing (also for r8a7795 and r8a77995) in sh-pfc-for-v4.17.

Please send follow-up patches to reduce vin_data duplication.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Geert Uytterhoeven March 9, 2018, 12:33 p.m. UTC | #5 
Hi Uli,

On Mon, Feb 26, 2018 at 11:18 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Feb 26, 2018 at 10:21 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht
>> <ulrich.hecht+renesas@gmail.com> wrote:
>>> On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven
>>> <geert@linux-m68k.org> wrote:
>>>> Would there be a use case for vin4_data4 and vin5_data4, or is that
>>>> mode only supported on R-Car H2?
>>>
>>> The docs don't mention it, so I would assume it's not supported.
>>
>> Thank you, queuing (also for r8a7795 and r8a77995) in sh-pfc-for-v4.17.
>
> Please send follow-up patches to reduce vin_data duplication.

Due to Sergei's submission for r8a77980, my attention was drawn to
Tables 26.8.x, which describes which pins are used for each video input
format.

The newly added tables for data18 are not correct, as they use the
VI4_DATA0-17 pins, while data18/rgb666 uses the same pins as data24/rgb888
mode, minus the 2 LSB pins for each channel. The BSP does it right, just
like the R-Car Gen2 PFC drivers.

As in the mean time this is in pinctrl/for-next, can you please send
follow-up patches fixing this bug for R-Car H3, M3-W, and D3?

Thanks!

P.S. Apparently R-Car Gen2 and Gen3 also support 8-bit YCbCr input data
     on the DATA8-15 pins, for which we don't have pin groups yet.
     Niklas: is this mode supported by the VIN driver?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Niklas Söderlund March 9, 2018, 9:58 p.m. UTC | #6 
Hi Geert,

On 2018-03-09 13:33:03 +0100, Geert Uytterhoeven wrote:
> Hi Uli,
> 
> On Mon, Feb 26, 2018 at 11:18 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Mon, Feb 26, 2018 at 10:21 AM, Geert Uytterhoeven
> > <geert@linux-m68k.org> wrote:
> >> On Mon, Feb 26, 2018 at 10:02 AM, Ulrich Hecht
> >> <ulrich.hecht+renesas@gmail.com> wrote:
> >>> On Tue, Feb 20, 2018 at 2:58 PM, Geert Uytterhoeven
> >>> <geert@linux-m68k.org> wrote:
> >>>> Would there be a use case for vin4_data4 and vin5_data4, or is that
> >>>> mode only supported on R-Car H2?
> >>>
> >>> The docs don't mention it, so I would assume it's not supported.
> >>
> >> Thank you, queuing (also for r8a7795 and r8a77995) in sh-pfc-for-v4.17.
> >
> > Please send follow-up patches to reduce vin_data duplication.
> 
> Due to Sergei's submission for r8a77980, my attention was drawn to
> Tables 26.8.x, which describes which pins are used for each video input
> format.
> 
> The newly added tables for data18 are not correct, as they use the
> VI4_DATA0-17 pins, while data18/rgb666 uses the same pins as data24/rgb888
> mode, minus the 2 LSB pins for each channel. The BSP does it right, just
> like the R-Car Gen2 PFC drivers.
> 
> As in the mean time this is in pinctrl/for-next, can you please send
> follow-up patches fixing this bug for R-Car H3, M3-W, and D3?
> 
> Thanks!
> 
> P.S. Apparently R-Car Gen2 and Gen3 also support 8-bit YCbCr input data
>      on the DATA8-15 pins, for which we don't have pin groups yet.
>      Niklas: is this mode supported by the VIN driver?

* Gen2
I can't find DATA12-15 in the datasheet I have, where did you find them?  
I'm looking at Tables 26.3, 26.4 and 26.5 on v1.0 of the Gen2 datasheet.  
But yes on Gen2 the VIN driver supports capturing from these data pins.

* Gen3
Currently CSI-2 are the only supported input method for the Gen3 
patches. It would be possible with a small hack to run the Gen2 driver 
on Gen3 and have it try and use the DATA pins, but this is not tested as 
prior to V3M we had no device to test this on as the DATA pins where all 
routed to EXIO connectors.

There have been some talks about adding support for this to the driver, 
I know Jacopo posted a patch-set a while ago for this but I have not 
tested it. Looking at the Gen3 Table 26.8.1 it sure looks like all
DATA lines DATA0-23 could be used on some SoCs to capture 24 bit RGB and 
YCbCr.

> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
Geert Uytterhoeven March 9, 2018, 10:24 p.m. UTC | #7 
Hi Niklas,

On Fri, Mar 9, 2018 at 10:58 PM, Niklas Söderlund
<niklas.soderlund@ragnatech.se> wrote:
> On 2018-03-09 13:33:03 +0100, Geert Uytterhoeven wrote:
>> P.S. Apparently R-Car Gen2 and Gen3 also support 8-bit YCbCr input data
>>      on the DATA8-15 pins, for which we don't have pin groups yet.
>>      Niklas: is this mode supported by the VIN driver?
>
> * Gen2
> I can't find DATA12-15 in the datasheet I have, where did you find them?
> I'm looking at Tables 26.3, 26.4 and 26.5 on v1.0 of the Gen2 datasheet.
> But yes on Gen2 the VIN driver supports capturing from these data pins.

Sorry, on Gen2 (all but V2H, to make matters more complicated), the DATA pins
are not numbered from 0 to 23, but split in 3 blocks of 8 pins, matching R, G,
and B blocks. But apart from the numbering, the formats are mostly the same (4
bit width is the exception, and supported on Gen2 only).

What I meant is the third mode in e.g. Table 26.5, "ITU-R BT.601/BT.709/BT.656
8-bit YCbCr-422 (VnDMR2/YDS = 1)", which uses VI0_G[7:0] instead of VIO_B[7:0]
for transfering 8-bit YCbCr data. Apparently the PFC driver doesn't have a pin
group for that combo.

(I have v2.00 of the datasheet, but the table looks identical in v1.0).

> * Gen3
> Currently CSI-2 are the only supported input method for the Gen3
> patches. It would be possible with a small hack to run the Gen2 driver
> on Gen3 and have it try and use the DATA pins, but this is not tested as
> prior to V3M we had no device to test this on as the DATA pins where all
> routed to EXIO connectors.
>
> There have been some talks about adding support for this to the driver,
> I know Jacopo posted a patch-set a while ago for this but I have not
> tested it. Looking at the Gen3 Table 26.8.1 it sure looks like all
> DATA lines DATA0-23 could be used on some SoCs to capture 24 bit RGB and
> YCbCr.

My question was about the second mode in the table, which is the same one
as the third mode on Gen2.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Niklas Söderlund March 9, 2018, 11:44 p.m. UTC | #8 
Hi Geert,

On 2018-03-09 23:24:37 +0100, Geert Uytterhoeven wrote:
> Hi Niklas,
> 
> On Fri, Mar 9, 2018 at 10:58 PM, Niklas Söderlund
> <niklas.soderlund@ragnatech.se> wrote:
> > On 2018-03-09 13:33:03 +0100, Geert Uytterhoeven wrote:
> >> P.S. Apparently R-Car Gen2 and Gen3 also support 8-bit YCbCr input data
> >>      on the DATA8-15 pins, for which we don't have pin groups yet.
> >>      Niklas: is this mode supported by the VIN driver?
> >
> > * Gen2
> > I can't find DATA12-15 in the datasheet I have, where did you find them?
> > I'm looking at Tables 26.3, 26.4 and 26.5 on v1.0 of the Gen2 datasheet.
> > But yes on Gen2 the VIN driver supports capturing from these data pins.
> 
> Sorry, on Gen2 (all but V2H, to make matters more complicated), the DATA pins
> are not numbered from 0 to 23, but split in 3 blocks of 8 pins, matching R, G,
> and B blocks. But apart from the numbering, the formats are mostly the same (4
> bit width is the exception, and supported on Gen2 only).
> 
> What I meant is the third mode in e.g. Table 26.5, "ITU-R BT.601/BT.709/BT.656
> 8-bit YCbCr-422 (VnDMR2/YDS = 1)", which uses VI0_G[7:0] instead of VIO_B[7:0]
> for transfering 8-bit YCbCr data. Apparently the PFC driver doesn't have a pin
> group for that combo.
> 
> (I have v2.00 of the datasheet, but the table looks identical in v1.0).
> 
> > * Gen3
> > Currently CSI-2 are the only supported input method for the Gen3
> > patches. It would be possible with a small hack to run the Gen2 driver
> > on Gen3 and have it try and use the DATA pins, but this is not tested as
> > prior to V3M we had no device to test this on as the DATA pins where all
> > routed to EXIO connectors.
> >
> > There have been some talks about adding support for this to the driver,
> > I know Jacopo posted a patch-set a while ago for this but I have not
> > tested it. Looking at the Gen3 Table 26.8.1 it sure looks like all
> > DATA lines DATA0-23 could be used on some SoCs to capture 24 bit RGB and
> > YCbCr.
> 
> My question was about the second mode in the table, which is the same one
> as the third mode on Gen2.

Ahh I see my bad. The current VIN driver for Gen2 which is the only one 
where this is supported can use the following input formats:

ITU-R BT.656 8-Bit
ITU-R BT.656 10-Bit
ITU-R BT.601 8-Bit
ITU-R BT.601 10-Bit
ITU-R BT.601/BT.709/BT.1358 16-Bit
ITU-R BT.601/BT.709 (RGB888) 24-Bit

But I do not have the hardware to be able to verify that all modes 
actually work. All modes are carried over from the driver conversion 
from soc-camera.

Looking at the Koelsch the modes that are tested are 'ITU-R 
BT.601/BT.709 (RGB888) 24-Bit' from the ADV7612 and 'ITU-R BT.656 8-Bit' 
from the ADV7180.

> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
Geert Uytterhoeven March 19, 2018, 10:23 a.m. UTC | #9 
Hi Niklas, Uli,

On Fri, Mar 9, 2018 at 11:24 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Fri, Mar 9, 2018 at 10:58 PM, Niklas Söderlund
> <niklas.soderlund@ragnatech.se> wrote:
>> On 2018-03-09 13:33:03 +0100, Geert Uytterhoeven wrote:
>>> P.S. Apparently R-Car Gen2 and Gen3 also support 8-bit YCbCr input data
>>>      on the DATA8-15 pins, for which we don't have pin groups yet.
>>>      Niklas: is this mode supported by the VIN driver?
>>
>> * Gen2
>> I can't find DATA12-15 in the datasheet I have, where did you find them?
>> I'm looking at Tables 26.3, 26.4 and 26.5 on v1.0 of the Gen2 datasheet.
>> But yes on Gen2 the VIN driver supports capturing from these data pins.
>
> Sorry, on Gen2 (all but V2H, to make matters more complicated), the DATA pins
> are not numbered from 0 to 23, but split in 3 blocks of 8 pins, matching R, G,
> and B blocks. But apart from the numbering, the formats are mostly the same (4
> bit width is the exception, and supported on Gen2 only).
>
> What I meant is the third mode in e.g. Table 26.5, "ITU-R BT.601/BT.709/BT.656
> 8-bit YCbCr-422 (VnDMR2/YDS = 1)", which uses VI0_G[7:0] instead of VIO_B[7:0]
> for transfering 8-bit YCbCr data. Apparently the PFC driver doesn't have a pin
> group for that combo.

Apparently the BSP has support for using the upper 8 MSB of the 16-bit
interface, and calls the pin group "data8_sft8".

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox

Patch

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index e5807d1..0ad8750 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -3853,6 +3853,400 @@  static const unsigned int usb30_mux[] = {
 	USB30_PWEN_MARK, USB30_OVC_MARK,
 };
 
+/* - VIN4 ------------------------------------------------------------------- */
+static const unsigned int vin4_data8_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+};
+static const unsigned int vin4_data8_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+};
+static const unsigned int vin4_data8_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+};
+static const unsigned int vin4_data8_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+};
+static const unsigned int vin4_data10_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+};
+static const unsigned int vin4_data10_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+};
+static const unsigned int vin4_data10_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+};
+static const unsigned int vin4_data10_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+};
+static const unsigned int vin4_data12_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+};
+static const unsigned int vin4_data12_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+};
+static const unsigned int vin4_data12_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+};
+static const unsigned int vin4_data12_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+};
+static const unsigned int vin4_data16_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_data16_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+static const unsigned int vin4_data16_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin4_data16_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+};
+static const unsigned int vin4_data18_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+};
+static const unsigned int vin4_data18_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+};
+static const unsigned int vin4_data18_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+};
+static const unsigned int vin4_data18_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+};
+static const unsigned int vin4_data20_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+};
+static const unsigned int vin4_data20_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+	VI4_DATA18_MARK, VI4_DATA19_MARK,
+};
+static const unsigned int vin4_data20_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+};
+static const unsigned int vin4_data20_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+	VI4_DATA18_MARK, VI4_DATA19_MARK,
+};
+static const unsigned int vin4_data24_a_pins[] = {
+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
+	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+};
+static const unsigned int vin4_data24_a_mux[] = {
+	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
+	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
+	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
+	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+	VI4_DATA18_MARK, VI4_DATA19_MARK,
+	VI4_DATA20_MARK, VI4_DATA21_MARK,
+	VI4_DATA22_MARK, VI4_DATA23_MARK,
+};
+static const unsigned int vin4_data24_b_pins[] = {
+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
+	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
+	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+};
+static const unsigned int vin4_data24_b_mux[] = {
+	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
+	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
+	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
+	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
+	VI4_DATA8_MARK,  VI4_DATA9_MARK,
+	VI4_DATA10_MARK, VI4_DATA11_MARK,
+	VI4_DATA12_MARK, VI4_DATA13_MARK,
+	VI4_DATA14_MARK, VI4_DATA15_MARK,
+	VI4_DATA16_MARK, VI4_DATA17_MARK,
+	VI4_DATA18_MARK, VI4_DATA19_MARK,
+	VI4_DATA20_MARK, VI4_DATA21_MARK,
+	VI4_DATA22_MARK, VI4_DATA23_MARK,
+};
+static const unsigned int vin4_sync_pins[] = {
+	/* HSYNC#, VSYNC# */
+	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
+};
+static const unsigned int vin4_sync_mux[] = {
+	VI4_HSYNC_N_MARK, VI4_VSYNC_N_MARK,
+};
+static const unsigned int vin4_field_pins[] = {
+	/* FIELD */
+	RCAR_GP_PIN(1, 16),
+};
+static const unsigned int vin4_field_mux[] = {
+	VI4_FIELD_MARK,
+};
+static const unsigned int vin4_clkenb_pins[] = {
+	/* CLKENB */
+	RCAR_GP_PIN(1, 19),
+};
+static const unsigned int vin4_clkenb_mux[] = {
+	VI4_CLKENB_MARK,
+};
+static const unsigned int vin4_clk_pins[] = {
+	/* CLK */
+	RCAR_GP_PIN(1, 27),
+};
+static const unsigned int vin4_clk_mux[] = {
+	VI4_CLK_MARK,
+};
+
+/* - VIN5 ------------------------------------------------------------------- */
+static const unsigned int vin5_data8_pins[] = {
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+};
+static const unsigned int vin5_data8_mux[] = {
+	VI5_DATA0_MARK, VI5_DATA1_MARK,
+	VI5_DATA2_MARK, VI5_DATA3_MARK,
+	VI5_DATA4_MARK, VI5_DATA5_MARK,
+	VI5_DATA6_MARK, VI5_DATA7_MARK,
+};
+static const unsigned int vin5_data10_pins[] = {
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+};
+static const unsigned int vin5_data10_mux[] = {
+	VI5_DATA0_MARK, VI5_DATA1_MARK,
+	VI5_DATA2_MARK, VI5_DATA3_MARK,
+	VI5_DATA4_MARK, VI5_DATA5_MARK,
+	VI5_DATA6_MARK, VI5_DATA7_MARK,
+	VI5_DATA8_MARK,  VI5_DATA9_MARK,
+};
+static const unsigned int vin5_data12_pins[] = {
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+};
+static const unsigned int vin5_data12_mux[] = {
+	VI5_DATA0_MARK, VI5_DATA1_MARK,
+	VI5_DATA2_MARK, VI5_DATA3_MARK,
+	VI5_DATA4_MARK, VI5_DATA5_MARK,
+	VI5_DATA6_MARK, VI5_DATA7_MARK,
+	VI5_DATA8_MARK,  VI5_DATA9_MARK,
+	VI5_DATA10_MARK, VI5_DATA11_MARK,
+};
+static const unsigned int vin5_data16_pins[] = {
+	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin5_data16_mux[] = {
+	VI5_DATA0_MARK, VI5_DATA1_MARK,
+	VI5_DATA2_MARK, VI5_DATA3_MARK,
+	VI5_DATA4_MARK, VI5_DATA5_MARK,
+	VI5_DATA6_MARK, VI5_DATA7_MARK,
+	VI5_DATA8_MARK,  VI5_DATA9_MARK,
+	VI5_DATA10_MARK, VI5_DATA11_MARK,
+	VI5_DATA12_MARK, VI5_DATA13_MARK,
+	VI5_DATA14_MARK, VI5_DATA15_MARK,
+};
+static const unsigned int vin5_sync_pins[] = {
+	/* HSYNC#, VSYNC# */
+	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
+};
+static const unsigned int vin5_sync_mux[] = {
+	VI5_HSYNC_N_MARK, VI5_VSYNC_N_MARK,
+};
+static const unsigned int vin5_field_pins[] = {
+	RCAR_GP_PIN(1, 11),
+};
+static const unsigned int vin5_field_mux[] = {
+	/* FIELD */
+	VI5_FIELD_MARK,
+};
+static const unsigned int vin5_clkenb_pins[] = {
+	RCAR_GP_PIN(1, 20),
+};
+static const unsigned int vin5_clkenb_mux[] = {
+	/* CLKENB */
+	VI5_CLKENB_MARK,
+};
+static const unsigned int vin5_clk_pins[] = {
+	RCAR_GP_PIN(1, 21),
+};
+static const unsigned int vin5_clk_mux[] = {
+	/* CLK */
+	VI5_CLK_MARK,
+};
+
 static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(audio_clk_a_a),
 	SH_PFC_PIN_GROUP(audio_clk_a_b),
@@ -4162,6 +4556,32 @@  static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(usb0),
 	SH_PFC_PIN_GROUP(usb1),
 	SH_PFC_PIN_GROUP(usb30),
+	SH_PFC_PIN_GROUP(vin4_data8_a),
+	SH_PFC_PIN_GROUP(vin4_data10_a),
+	SH_PFC_PIN_GROUP(vin4_data12_a),
+	SH_PFC_PIN_GROUP(vin4_data16_a),
+	SH_PFC_PIN_GROUP(vin4_data18_a),
+	SH_PFC_PIN_GROUP(vin4_data20_a),
+	SH_PFC_PIN_GROUP(vin4_data24_a),
+	SH_PFC_PIN_GROUP(vin4_data8_b),
+	SH_PFC_PIN_GROUP(vin4_data10_b),
+	SH_PFC_PIN_GROUP(vin4_data12_b),
+	SH_PFC_PIN_GROUP(vin4_data16_b),
+	SH_PFC_PIN_GROUP(vin4_data18_b),
+	SH_PFC_PIN_GROUP(vin4_data20_b),
+	SH_PFC_PIN_GROUP(vin4_data24_b),
+	SH_PFC_PIN_GROUP(vin4_sync),
+	SH_PFC_PIN_GROUP(vin4_field),
+	SH_PFC_PIN_GROUP(vin4_clkenb),
+	SH_PFC_PIN_GROUP(vin4_clk),
+	SH_PFC_PIN_GROUP(vin5_data8),
+	SH_PFC_PIN_GROUP(vin5_data10),
+	SH_PFC_PIN_GROUP(vin5_data12),
+	SH_PFC_PIN_GROUP(vin5_data16),
+	SH_PFC_PIN_GROUP(vin5_sync),
+	SH_PFC_PIN_GROUP(vin5_field),
+	SH_PFC_PIN_GROUP(vin5_clkenb),
+	SH_PFC_PIN_GROUP(vin5_clk),
 };
 
 static const char * const audio_clk_groups[] = {
@@ -4613,6 +5033,38 @@  static const char * const usb30_groups[] = {
 	"usb30",
 };
 
+static const char * const vin4_groups[] = {
+	"vin4_data8_a",
+	"vin4_data10_a",
+	"vin4_data12_a",
+	"vin4_data16_a",
+	"vin4_data18_a",
+	"vin4_data20_a",
+	"vin4_data24_a",
+	"vin4_data8_b",
+	"vin4_data10_b",
+	"vin4_data12_b",
+	"vin4_data16_b",
+	"vin4_data18_b",
+	"vin4_data20_b",
+	"vin4_data24_b",
+	"vin4_sync",
+	"vin4_field",
+	"vin4_clkenb",
+	"vin4_clk",
+};
+
+static const char * const vin5_groups[] = {
+	"vin5_data8",
+	"vin5_data10",
+	"vin5_data12",
+	"vin5_data16",
+	"vin5_sync",
+	"vin5_field",
+	"vin5_clkenb",
+	"vin5_clk",
+};
+
 static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(audio_clk),
 	SH_PFC_FUNCTION(avb),
@@ -4661,6 +5113,8 @@  static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(usb0),
 	SH_PFC_FUNCTION(usb1),
 	SH_PFC_FUNCTION(usb30),
+	SH_PFC_FUNCTION(vin4),
+	SH_PFC_FUNCTION(vin5),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {