| Message ID | 1521017305-28518-2-git-send-email-cpandya@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Chintan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc5 next-20180316]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Chintan-Pandya/Fix-issues-with-huge-mapping-in-ioremap/20180316-132223
config: powerpc-ppc64_defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc
All errors (new ones prefixed by >>):
In file included from arch/powerpc/include/asm/tlb.h:36:0,
from arch/powerpc/mm/mem.c:50:
>> include/asm-generic/tlb.h:299:20: error: conflicting types for 'flush_tlb_pgtable'
static inline void flush_tlb_pgtable(struct mm_struct *mm,
^~~~~~~~~~~~~~~~~
In file included from arch/powerpc/include/asm/tlbflush.h:81:0,
from arch/powerpc/include/asm/pgtable.h:24,
from include/linux/memremap.h:8,
from include/linux/mm.h:27,
from arch/powerpc/mm/mem.c:27:
arch/powerpc/include/asm/book3s/64/tlbflush.h:143:20: note: previous definition of 'flush_tlb_pgtable' was here
static inline void flush_tlb_pgtable(struct mmu_gather *tlb, unsigned long address)
^~~~~~~~~~~~~~~~~
vim +/flush_tlb_pgtable +299 include/asm-generic/tlb.h
297
298 #ifndef CONFIG_ARM64
> 299 static inline void flush_tlb_pgtable(struct mm_struct *mm,
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 9e82dd7..5f656f0 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -209,6 +209,11 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, dsb(ish); } +static inline void flush_tlb_pgtable(struct mm_struct *mm, + unsigned long uaddr) +{ + __flush_tlb_pgtable(mm, uaddr); +} #endif #endif diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index faddde4..7832c0a 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -295,4 +295,10 @@ static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb, #define tlb_migrate_finish(mm) do {} while (0) +#ifndef CONFIG_ARM64 +static inline void flush_tlb_pgtable(struct mm_struct *mm, + unsigned long uaddr) +{ +} +#endif #endif /* _ASM_GENERIC__TLB_H */
ARM64 MMU implements invalidation of TLB for intermediate page tables for perticular VA. This may or may not be available for other arch. So, provide this API hook only for ARM64, for now. Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> --- arch/arm64/include/asm/tlbflush.h | 5 +++++ include/asm-generic/tlb.h | 6 ++++++ 2 files changed, 11 insertions(+)