@@ -1300,7 +1300,7 @@ static s32 adpt_i2o_post_this(adpt_hba* pHba, u32* data, int len)
wmb();
//post message
- writel(m, pHba->post_port);
+ writel_relaxed(m, pHba->post_port);
wmb();
return 0;
@@ -1390,7 +1390,7 @@ static s32 adpt_i2o_reset_hba(adpt_hba* pHba)
memcpy_toio(pHba->msg_addr_virt+m, msg, sizeof(msg));
wmb();
- writel(m, pHba->post_port);
+ writel_relaxed(m, pHba->post_port);
wmb();
while(*status == 0){
@@ -2797,7 +2797,7 @@ static s32 adpt_send_nop(adpt_hba*pHba,u32 m)
writel( 0,&msg[2]);
wmb();
- writel(m, pHba->post_port);
+ writel_relaxed(m, pHba->post_port);
wmb();
return 0;
}
Code includes barrier() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> --- drivers/scsi/dpt_i2o.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)