| Message ID | 20180323144728.61548-6-michal.wajdeczko@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote: > On platforms with CTB based GuC communications, we will handle > GuC events in a different way. Let's make event handler a virtual > function to allow easy switch between those variants. > > Credits-to: Oscar Mateo <oscar.mateo@intel.com> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Oscar Mateo <oscar.mateo@intel.com> > --- > drivers/gpu/drm/i915/intel_guc.c | 8 +++++++- > drivers/gpu/drm/i915/intel_guc.h | 10 ++++++++++ > drivers/gpu/drm/i915/intel_uc.c | 2 ++ > 3 files changed, 19 insertions(+), 1 deletion(-) > I've gotten used to 'receive', but 'handler' makes sense too. Reviewed-by: Michel Thierry <michel.thierry@intel.com> > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c > index 9ce01e5..118db81 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -69,6 +69,7 @@ void intel_guc_init_early(struct intel_guc *guc) > mutex_init(&guc->send_mutex); > spin_lock_init(&guc->irq_lock); > guc->send = intel_guc_send_nop; > + guc->handler = intel_guc_to_host_event_handler_nop; > guc->notify = gen8_guc_raise_irq; > } > > @@ -317,6 +318,11 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, > return -ENODEV; > } > > +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc) > +{ > + WARN(1, "Unexpected event: no suitable handler\n"); > +} > + > /* > * This function implements the MMIO based host to GuC interface. > */ > @@ -388,7 +394,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, > return ret; > } > > -void intel_guc_to_host_event_handler(struct intel_guc *guc) > +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc) > { > struct drm_i915_private *dev_priv = guc_to_i915(guc); > u32 msg, val; > diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h > index 7ee0732..6dc109a 100644 > --- a/drivers/gpu/drm/i915/intel_guc.h > +++ b/drivers/gpu/drm/i915/intel_guc.h > @@ -91,6 +91,9 @@ struct intel_guc { > int (*send)(struct intel_guc *guc, const u32 *data, u32 len, > u32 *response_buf, u32 response_buf_size); > > + /* GuC's FW specific event handler function */ > + void (*handler)(struct intel_guc *guc); > + > /* GuC's FW specific notify function */ > void (*notify)(struct intel_guc *guc); > }; > @@ -113,6 +116,11 @@ static inline void intel_guc_notify(struct intel_guc *guc) > guc->notify(guc); > } > > +static inline void intel_guc_to_host_event_handler(struct intel_guc *guc) > +{ > + guc->handler(guc); > +} > + > /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ > #define GUC_GGTT_TOP 0xFEE00000 > > @@ -153,6 +161,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, > int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, > u32 *response_buf, u32 response_buf_size); > void intel_guc_to_host_event_handler(struct intel_guc *guc); > +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc); > +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc); > int intel_guc_sample_forcewake(struct intel_guc *guc); > int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); > int intel_guc_suspend(struct intel_guc *guc); > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c > index 34f8a2c..8dc6a9c 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -234,6 +234,7 @@ static int guc_enable_communication(struct intel_guc *guc) > return intel_guc_ct_enable(&guc->ct); > > guc->send = intel_guc_send_mmio; > + guc->handler = intel_guc_to_host_event_handler_mmio; > return 0; > } > > @@ -247,6 +248,7 @@ static void guc_disable_communication(struct intel_guc *guc) > gen9_disable_guc_interrupts(dev_priv); > > guc->send = intel_guc_send_nop; > + guc->handler = intel_guc_to_host_event_handler_nop; > } > > int intel_uc_init_misc(struct drm_i915_private *dev_priv) > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >
On Fri, 23 Mar 2018 23:25:58 +0100, Michel Thierry <michel.thierry@intel.com> wrote: > On 3/23/2018 7:47 AM, Michal Wajdeczko wrote: >> On platforms with CTB based GuC communications, we will handle >> GuC events in a different way. Let's make event handler a virtual >> function to allow easy switch between those variants. >> Credits-to: Oscar Mateo <oscar.mateo@intel.com> >> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Oscar Mateo <oscar.mateo@intel.com> >> --- >> drivers/gpu/drm/i915/intel_guc.c | 8 +++++++- >> drivers/gpu/drm/i915/intel_guc.h | 10 ++++++++++ >> drivers/gpu/drm/i915/intel_uc.c | 2 ++ >> 3 files changed, 19 insertions(+), 1 deletion(-) >> > > I've gotten used to 'receive', but 'handler' makes sense too. Name of the function that handles irq events from GuC was recently changed to intel_guc_to_host_event_handler() hence 'handler' as vptr name. /m > > Reviewed-by: Michel Thierry <michel.thierry@intel.com> > >> diff --git a/drivers/gpu/drm/i915/intel_guc.c >> b/drivers/gpu/drm/i915/intel_guc.c >> index 9ce01e5..118db81 100644 >> --- a/drivers/gpu/drm/i915/intel_guc.c >> +++ b/drivers/gpu/drm/i915/intel_guc.c >> @@ -69,6 +69,7 @@ void intel_guc_init_early(struct intel_guc *guc) >> mutex_init(&guc->send_mutex); >> spin_lock_init(&guc->irq_lock); >> guc->send = intel_guc_send_nop; >> + guc->handler = intel_guc_to_host_event_handler_nop; >> guc->notify = gen8_guc_raise_irq; >> } >> @@ -317,6 +318,11 @@ int intel_guc_send_nop(struct intel_guc *guc, >> const u32 *action, u32 len, >> return -ENODEV; >> } >> +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc) >> +{ >> + WARN(1, "Unexpected event: no suitable handler\n"); >> +} >> + >> /* >> * This function implements the MMIO based host to GuC interface. >> */ >> @@ -388,7 +394,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, >> const u32 *action, u32 len, >> return ret; >> } >> -void intel_guc_to_host_event_handler(struct intel_guc *guc) >> +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc) >> { >> struct drm_i915_private *dev_priv = guc_to_i915(guc); >> u32 msg, val; >> diff --git a/drivers/gpu/drm/i915/intel_guc.h >> b/drivers/gpu/drm/i915/intel_guc.h >> index 7ee0732..6dc109a 100644 >> --- a/drivers/gpu/drm/i915/intel_guc.h >> +++ b/drivers/gpu/drm/i915/intel_guc.h >> @@ -91,6 +91,9 @@ struct intel_guc { >> int (*send)(struct intel_guc *guc, const u32 *data, u32 len, >> u32 *response_buf, u32 response_buf_size); >> + /* GuC's FW specific event handler function */ >> + void (*handler)(struct intel_guc *guc); >> + >> /* GuC's FW specific notify function */ >> void (*notify)(struct intel_guc *guc); >> }; >> @@ -113,6 +116,11 @@ static inline void intel_guc_notify(struct >> intel_guc *guc) >> guc->notify(guc); >> } >> +static inline void intel_guc_to_host_event_handler(struct intel_guc >> *guc) >> +{ >> + guc->handler(guc); >> +} >> + >> /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ >> #define GUC_GGTT_TOP 0xFEE00000 >> @@ -153,6 +161,8 @@ int intel_guc_send_nop(struct intel_guc *guc, >> const u32 *action, u32 len, >> int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 >> len, >> u32 *response_buf, u32 response_buf_size); >> void intel_guc_to_host_event_handler(struct intel_guc *guc); >> +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc); >> +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc); >> int intel_guc_sample_forcewake(struct intel_guc *guc); >> int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); >> int intel_guc_suspend(struct intel_guc *guc); >> diff --git a/drivers/gpu/drm/i915/intel_uc.c >> b/drivers/gpu/drm/i915/intel_uc.c >> index 34f8a2c..8dc6a9c 100644 >> --- a/drivers/gpu/drm/i915/intel_uc.c >> +++ b/drivers/gpu/drm/i915/intel_uc.c >> @@ -234,6 +234,7 @@ static int guc_enable_communication(struct >> intel_guc *guc) >> return intel_guc_ct_enable(&guc->ct); >> guc->send = intel_guc_send_mmio; >> + guc->handler = intel_guc_to_host_event_handler_mmio; >> return 0; >> } >> @@ -247,6 +248,7 @@ static void guc_disable_communication(struct >> intel_guc *guc) >> gen9_disable_guc_interrupts(dev_priv); >> guc->send = intel_guc_send_nop; >> + guc->handler = intel_guc_to_host_event_handler_nop; >> } >> int intel_uc_init_misc(struct drm_i915_private *dev_priv) >> -- >> 1.9.1 >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 9ce01e5..118db81 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -69,6 +69,7 @@ void intel_guc_init_early(struct intel_guc *guc) mutex_init(&guc->send_mutex); spin_lock_init(&guc->irq_lock); guc->send = intel_guc_send_nop; + guc->handler = intel_guc_to_host_event_handler_nop; guc->notify = gen8_guc_raise_irq; } @@ -317,6 +318,11 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, return -ENODEV; } +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc) +{ + WARN(1, "Unexpected event: no suitable handler\n"); +} + /* * This function implements the MMIO based host to GuC interface. */ @@ -388,7 +394,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, return ret; } -void intel_guc_to_host_event_handler(struct intel_guc *guc) +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc) { struct drm_i915_private *dev_priv = guc_to_i915(guc); u32 msg, val; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 7ee0732..6dc109a 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -91,6 +91,9 @@ struct intel_guc { int (*send)(struct intel_guc *guc, const u32 *data, u32 len, u32 *response_buf, u32 response_buf_size); + /* GuC's FW specific event handler function */ + void (*handler)(struct intel_guc *guc); + /* GuC's FW specific notify function */ void (*notify)(struct intel_guc *guc); }; @@ -113,6 +116,11 @@ static inline void intel_guc_notify(struct intel_guc *guc) guc->notify(guc); } +static inline void intel_guc_to_host_event_handler(struct intel_guc *guc) +{ + guc->handler(guc); +} + /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ #define GUC_GGTT_TOP 0xFEE00000 @@ -153,6 +161,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len, u32 *response_buf, u32 response_buf_size); void intel_guc_to_host_event_handler(struct intel_guc *guc); +void intel_guc_to_host_event_handler_nop(struct intel_guc *guc); +void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc); int intel_guc_sample_forcewake(struct intel_guc *guc); int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset); int intel_guc_suspend(struct intel_guc *guc); diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 34f8a2c..8dc6a9c 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -234,6 +234,7 @@ static int guc_enable_communication(struct intel_guc *guc) return intel_guc_ct_enable(&guc->ct); guc->send = intel_guc_send_mmio; + guc->handler = intel_guc_to_host_event_handler_mmio; return 0; } @@ -247,6 +248,7 @@ static void guc_disable_communication(struct intel_guc *guc) gen9_disable_guc_interrupts(dev_priv); guc->send = intel_guc_send_nop; + guc->handler = intel_guc_to_host_event_handler_nop; } int intel_uc_init_misc(struct drm_i915_private *dev_priv)
On platforms with CTB based GuC communications, we will handle GuC events in a different way. Let's make event handler a virtual function to allow easy switch between those variants. Credits-to: Oscar Mateo <oscar.mateo@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> --- drivers/gpu/drm/i915/intel_guc.c | 8 +++++++- drivers/gpu/drm/i915/intel_guc.h | 10 ++++++++++ drivers/gpu/drm/i915/intel_uc.c | 2 ++ 3 files changed, 19 insertions(+), 1 deletion(-)