| Message ID | 1523915821-30624-1-git-send-email-oscar.mateo@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Oscar Mateo (2018-04-16 22:57:01) > Silence smatch over: > > drivers/gpu/drm/i915/selftests/intel_workarounds.c:58 read_nonprivs() error: 'cs' dereferencing possible ERR_PTR() > > by handling a potential (but unlikely) failure of intel_ring_begin. > > Fixes: f4ecfbfc32ed ("drm/i915: Check whitelist registers across resets") > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> Serves me right for forgetting to check with smatch myself. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
Quoting Patchwork (2018-04-17 00:47:27) > == Series Details == > > Series: drm/i915/selftests: Handle a potential failure of intel_ring_begin > URL : https://patchwork.freedesktop.org/series/41773/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4058_full -> Patchwork_8700_full = > > == Summary - FAILURE == > > Serious unknown changes coming with Patchwork_8700_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_8700_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://patchwork.freedesktop.org/api/1.0/series/41773/revisions/1/mbox/ > > == Possible new issues == > > Here are the unknown changes that may have been introduced in Patchwork_8700_full: > > === IGT changes === > > ==== Possible regressions ==== > > igt@gem_wait@wait-vebox: > shard-apl: PASS -> FAIL Unconnected to this patch, so pushed. Thanks for the fix up, -Chris
diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c index fe7deca..5455b26 100644 --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c @@ -54,6 +54,11 @@ srm++; cs = intel_ring_begin(rq, 4 * RING_MAX_NONPRIV_SLOTS); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto err_req; + } + for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) { *cs++ = srm; *cs++ = i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(base, i)); @@ -75,6 +80,8 @@ return result; +err_req: + i915_request_add(rq); err_pin: i915_vma_unpin(vma); err_obj:
Silence smatch over: drivers/gpu/drm/i915/selftests/intel_workarounds.c:58 read_nonprivs() error: 'cs' dereferencing possible ERR_PTR() by handling a potential (but unlikely) failure of intel_ring_begin. Fixes: f4ecfbfc32ed ("drm/i915: Check whitelist registers across resets") Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/selftests/intel_workarounds.c | 7 +++++++ 1 file changed, 7 insertions(+)