diff mbox

[2/4] ARM: dts: renesas: r8a7791: Add FDP1 instances

Message ID 20180422103528.3402-3-laurent.pinchart+renesas@ideasonboard.com (mailing list archive)
State Accepted
Commit e7f36fb8ffafbda9c168e1aafab5b5ebe54ebaa8
Delegated to: Simon Horman
Headers show

Commit Message

Laurent Pinchart April 22, 2018, 10:35 a.m. UTC 
The r8a7791 has two FDP1 instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7791.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Simon Horman April 23, 2018, 11:04 a.m. UTC | #1 
On Sun, Apr 22, 2018 at 01:35:26PM +0300, Laurent Pinchart wrote:
> The r8a7791 has two FDP1 instances.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Thanks, applied.
Geert Uytterhoeven April 24, 2018, 3:01 p.m. UTC | #2 
On Sun, Apr 22, 2018 at 12:35 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The r8a7791 has two FDP1 instances.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert
Simon Horman April 25, 2018, 6:50 a.m. UTC | #3 
On Tue, Apr 24, 2018 at 05:01:52PM +0200, Geert Uytterhoeven wrote:
> On Sun, Apr 22, 2018 at 12:35 PM, Laurent Pinchart
> <laurent.pinchart+renesas@ideasonboard.com> wrote:
> > The r8a7791 has two FDP1 instances.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, tag added.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index f11dab71b03a..55b5a56da35e 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1621,6 +1621,24 @@ 
 			resets = <&cpg 127>;
 		};
 
+		fdp1@fe940000 {
+			compatible = "renesas,fdp1";
+			reg = <0 0xfe940000 0 0x2400>;
+			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 119>;
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 119>;
+		};
+
+		fdp1@fe944000 {
+			compatible = "renesas,fdp1";
+			reg = <0 0xfe944000 0 0x2400>;
+			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 118>;
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 118>;
+		};
+
 		jpu: jpeg-codec@fe980000 {
 			compatible = "renesas,jpu-r8a7791",
 				     "renesas,rcar-gen2-jpu";