| Message ID | 1522742446-5084-3-git-send-email-cpandya@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Apr 03, 2018 at 01:30:44PM +0530, Chintan Pandya wrote: > Add an interface to invalidate intermediate page tables > from TLB for kernel. > > Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> > --- > arch/arm64/include/asm/tlbflush.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h > index 9e82dd7..6a4816d 100644 > --- a/arch/arm64/include/asm/tlbflush.h > +++ b/arch/arm64/include/asm/tlbflush.h > @@ -209,6 +209,12 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, > dsb(ish); > } > > +static inline void __flush_tlb_kernel_pgtable(unsigned long addr) > +{ > + addr >>= 12; > + __tlbi(vaae1is, addr); > + dsb(ish); > +} > #endif Please use __TLBI_VADDR here as it does some additional masking.
On 4/27/2018 3:59 PM, Catalin Marinas wrote: > On Tue, Apr 03, 2018 at 01:30:44PM +0530, Chintan Pandya wrote: >> Add an interface to invalidate intermediate page tables >> from TLB for kernel. >> >> Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> >> --- >> arch/arm64/include/asm/tlbflush.h | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h >> index 9e82dd7..6a4816d 100644 >> --- a/arch/arm64/include/asm/tlbflush.h >> +++ b/arch/arm64/include/asm/tlbflush.h >> @@ -209,6 +209,12 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, >> dsb(ish); >> } >> >> +static inline void __flush_tlb_kernel_pgtable(unsigned long addr) >> +{ >> + addr >>= 12; >> + __tlbi(vaae1is, addr); >> + dsb(ish); >> +} >> #endif > > Please use __TLBI_VADDR here as it does some additional masking. > Sure. Chintan
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 9e82dd7..6a4816d 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -209,6 +209,12 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, dsb(ish); } +static inline void __flush_tlb_kernel_pgtable(unsigned long addr) +{ + addr >>= 12; + __tlbi(vaae1is, addr); + dsb(ish); +} #endif #endif
Add an interface to invalidate intermediate page tables from TLB for kernel. Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> --- arch/arm64/include/asm/tlbflush.h | 6 ++++++ 1 file changed, 6 insertions(+)