| Message ID | 1524966879-9424-1-git-send-email-linux@roeck-us.net (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
2018-04-29 3:54 GMT+02:00 Guenter Roeck <linux@roeck-us.net>: > Add Raven Ridge root bridge and data fabric PCI IDs. > This is required for amd_pci_dev_to_node_id() and amd_smn_read(). > > Signed-off-by: Guenter Roeck <linux@roeck-us.net> > --- > This patch is a prerequisite for the second patch in the series. > I'll be happy to apply both patches through hwmon if that is acceptable > (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch > to be available upstream. > > Since that there is no public documentation available for Raven Ridge, > PCI IDs are derived from output of lspci. > > arch/x86/kernel/amd_nb.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > index c88e0b127810..bd33613ecb7c 100644 > --- a/arch/x86/kernel/amd_nb.c > +++ b/arch/x86/kernel/amd_nb.c > @@ -14,8 +14,11 @@ > #include <asm/amd_nb.h> > > #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 > +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 > #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 > +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F3 0x15eb > +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F4 0x15ec > > /* Protect the PCI config register pairs used for SMN and DF indirect access. */ > static DEFINE_MUTEX(smn_mutex); > @@ -24,6 +27,7 @@ static u32 *flush_words; > > static const struct pci_device_id amd_root_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_ROOT) }, > {} > }; > > @@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, > {} > }; > @@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, > {} > }; > -- > 2.7.4 > Works fine for me on top stable and on top v4.17-rc2-398-gcdface520934 Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com> Regards -- To unsubscribe from this list: send the line "unsubscribe linux-hwmon" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
2018-04-29 3:54 GMT+02:00 Guenter Roeck <linux@roeck-us.net>: > Add Raven Ridge root bridge and data fabric PCI IDs. > This is required for amd_pci_dev_to_node_id() and amd_smn_read(). > > Signed-off-by: Guenter Roeck <linux@roeck-us.net> > --- > This patch is a prerequisite for the second patch in the series. > I'll be happy to apply both patches through hwmon if that is acceptable > (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch > to be available upstream. > > Since that there is no public documentation available for Raven Ridge, > PCI IDs are derived from output of lspci. > > arch/x86/kernel/amd_nb.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > index c88e0b127810..bd33613ecb7c 100644 > --- a/arch/x86/kernel/amd_nb.c > +++ b/arch/x86/kernel/amd_nb.c > @@ -14,8 +14,11 @@ > #include <asm/amd_nb.h> > > #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 > +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 > #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 > +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F3 0x15eb > +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F4 0x15ec > > /* Protect the PCI config register pairs used for SMN and DF indirect access. */ > static DEFINE_MUTEX(smn_mutex); > @@ -24,6 +27,7 @@ static u32 *flush_words; > > static const struct pci_device_id amd_root_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_ROOT) }, > {} > }; > > @@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F3) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, > {} > }; > @@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, > + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F4) }, > { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, > {} > }; > -- > 2.7.4 > Works fine for me on top stable and on top v4.17-rc2-398-gcdface520934 Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com> Regards -- To unsubscribe from this list: send the line "unsubscribe linux-hwmon" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sat, Apr 28, 2018 at 06:54:38PM -0700, Guenter Roeck wrote: > Add Raven Ridge root bridge and data fabric PCI IDs. > This is required for amd_pci_dev_to_node_id() and amd_smn_read(). > > Signed-off-by: Guenter Roeck <linux@roeck-us.net> > --- > This patch is a prerequisite for the second patch in the series. > I'll be happy to apply both patches through hwmon if that is acceptable > (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch > to be available upstream. > > Since that there is no public documentation available for Raven Ridge, > PCI IDs are derived from output of lspci. > > arch/x86/kernel/amd_nb.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > index c88e0b127810..bd33613ecb7c 100644 > --- a/arch/x86/kernel/amd_nb.c > +++ b/arch/x86/kernel/amd_nb.c > @@ -14,8 +14,11 @@ > #include <asm/amd_nb.h> > > #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 > +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 I think the nomenclature we decided upon at the time was ...AMD_<family>H_M<model>H... PCI_DEVICE_ID_AMD_15H_M10H_F3, for example. And in this case, it should be PCI_DEVICE_ID_AMD_17H_M<which model is RV>H_F<PCI function number> Yazen, which is the first model of Raven Ridge? Thx.
On 04/29/2018 10:53 AM, Borislav Petkov wrote: > On Sat, Apr 28, 2018 at 06:54:38PM -0700, Guenter Roeck wrote: >> Add Raven Ridge root bridge and data fabric PCI IDs. >> This is required for amd_pci_dev_to_node_id() and amd_smn_read(). >> >> Signed-off-by: Guenter Roeck <linux@roeck-us.net> >> --- >> This patch is a prerequisite for the second patch in the series. >> I'll be happy to apply both patches through hwmon if that is acceptable >> (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch >> to be available upstream. >> >> Since that there is no public documentation available for Raven Ridge, >> PCI IDs are derived from output of lspci. >> >> arch/x86/kernel/amd_nb.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c >> index c88e0b127810..bd33613ecb7c 100644 >> --- a/arch/x86/kernel/amd_nb.c >> +++ b/arch/x86/kernel/amd_nb.c >> @@ -14,8 +14,11 @@ >> #include <asm/amd_nb.h> >> >> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 >> +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > > I think the nomenclature we decided upon at the time was > > ...AMD_<family>H_M<model>H... > > PCI_DEVICE_ID_AMD_15H_M10H_F3, for example. > > And in this case, it should be > > PCI_DEVICE_ID_AMD_17H_M<which model is RV>H_F<PCI function number> > Makes sense. > Yazen, which is the first model of Raven Ridge? > 2400G is model 17 (0x11). I was unable to find information if there are other chips/models using the same set of PCI IDs. I'll wait for additional feedback before resending. Thanks, Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-hwmon" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> -----Original Message----- > From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck > Sent: Sunday, April 29, 2018 2:24 PM > To: Borislav Petkov <bp@suse.de>; Ghannam, Yazen > <Yazen.Ghannam@amd.com> > Cc: Thomas Gleixner <tglx@linutronix.de>; Clemens Ladisch > <clemens@ladisch.de>; x86@kernel.org; Jean Delvare <jdelvare@suse.com>; > linux-kernel@vger.kernel.org; linux-hwmon@vger.kernel.org; Woods, Brian > <Brian.Woods@amd.com> > Subject: Re: [PATCH 1/2] x86/amd_nb: Add support for Raven Ridge CPUs > > On 04/29/2018 10:53 AM, Borislav Petkov wrote: > > On Sat, Apr 28, 2018 at 06:54:38PM -0700, Guenter Roeck wrote: > >> Add Raven Ridge root bridge and data fabric PCI IDs. > >> This is required for amd_pci_dev_to_node_id() and amd_smn_read(). > >> > >> Signed-off-by: Guenter Roeck <linux@roeck-us.net> > >> --- > >> This patch is a prerequisite for the second patch in the series. > >> I'll be happy to apply both patches through hwmon if that is acceptable > >> (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch > >> to be available upstream. > >> > >> Since that there is no public documentation available for Raven Ridge, > >> PCI IDs are derived from output of lspci. > >> > >> arch/x86/kernel/amd_nb.c | 6 ++++++ > >> 1 file changed, 6 insertions(+) > >> > >> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > >> index c88e0b127810..bd33613ecb7c 100644 > >> --- a/arch/x86/kernel/amd_nb.c > >> +++ b/arch/x86/kernel/amd_nb.c > >> @@ -14,8 +14,11 @@ > >> #include <asm/amd_nb.h> > >> > >> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 > >> +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > > > > I think the nomenclature we decided upon at the time was > > > > ...AMD_<family>H_M<model>H... > > > > PCI_DEVICE_ID_AMD_15H_M10H_F3, for example. > > > > And in this case, it should be > > > > PCI_DEVICE_ID_AMD_17H_M<which model is RV>H_F<PCI function > number> > > > > Makes sense. > > > Yazen, which is the first model of Raven Ridge? > > > > 2400G is model 17 (0x11). I was unable to find information if there are > other chips/models using the same set of PCI IDs. > > I'll wait for additional feedback before resending. There are other models using the same set of IDs, but the first is 10h. Also, the F3 IDs for Fam17h and Fam17hMod10h are used in both amd_nb.c and k10temp.c. Can you please delete the F3 IDs from these files and add them to "include/linux/pci_ids.h"? Thanks! -Yazen
On Mon, Apr 30, 2018 at 03:38:59PM +0000, Ghannam, Yazen wrote: > > -----Original Message----- > > From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck > > Sent: Sunday, April 29, 2018 2:24 PM > > To: Borislav Petkov <bp@suse.de>; Ghannam, Yazen > > <Yazen.Ghannam@amd.com> > > Cc: Thomas Gleixner <tglx@linutronix.de>; Clemens Ladisch > > <clemens@ladisch.de>; x86@kernel.org; Jean Delvare <jdelvare@suse.com>; > > linux-kernel@vger.kernel.org; linux-hwmon@vger.kernel.org; Woods, Brian > > <Brian.Woods@amd.com> > > Subject: Re: [PATCH 1/2] x86/amd_nb: Add support for Raven Ridge CPUs > > > > On 04/29/2018 10:53 AM, Borislav Petkov wrote: > > > On Sat, Apr 28, 2018 at 06:54:38PM -0700, Guenter Roeck wrote: > > >> Add Raven Ridge root bridge and data fabric PCI IDs. > > >> This is required for amd_pci_dev_to_node_id() and amd_smn_read(). > > >> > > >> Signed-off-by: Guenter Roeck <linux@roeck-us.net> > > >> --- > > >> This patch is a prerequisite for the second patch in the series. > > >> I'll be happy to apply both patches through hwmon if that is acceptable > > >> (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch > > >> to be available upstream. > > >> > > >> Since that there is no public documentation available for Raven Ridge, > > >> PCI IDs are derived from output of lspci. > > >> > > >> arch/x86/kernel/amd_nb.c | 6 ++++++ > > >> 1 file changed, 6 insertions(+) > > >> > > >> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c > > >> index c88e0b127810..bd33613ecb7c 100644 > > >> --- a/arch/x86/kernel/amd_nb.c > > >> +++ b/arch/x86/kernel/amd_nb.c > > >> @@ -14,8 +14,11 @@ > > >> #include <asm/amd_nb.h> > > >> > > >> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 > > >> +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > > > > > > I think the nomenclature we decided upon at the time was > > > > > > ...AMD_<family>H_M<model>H... > > > > > > PCI_DEVICE_ID_AMD_15H_M10H_F3, for example. > > > > > > And in this case, it should be > > > > > > PCI_DEVICE_ID_AMD_17H_M<which model is RV>H_F<PCI function > > number> > > > > > > > Makes sense. > > > > > Yazen, which is the first model of Raven Ridge? > > > > > > > 2400G is model 17 (0x11). I was unable to find information if there are > > other chips/models using the same set of PCI IDs. > > > > I'll wait for additional feedback before resending. > > There are other models using the same set of IDs, but the first is 10h. > Ok, I'll make it PCI_DEVICE_ID_AMD_17H_M10H_ROOT and PCI_DEVICE_ID_AMD_17H_M10H_DF_F{3,4}. > Also, the F3 IDs for Fam17h and Fam17hMod10h are used in both amd_nb.c > and k10temp.c. Can you please delete the F3 IDs from these files and add > them to "include/linux/pci_ids.h"? > I'll be happy to do that. However, my preference would be to do that in a separate patch. I would like to see this patch and patch 2/2 applied to 4.16+ since together they fix a potential race condition as well as temperature reporting problems with multi-die Zen chips (Threadripper and EPYC). The pci_id.h changes are not bug fixes and would be more appropriate for v4.18. Thanks, Guenter > Thanks! > > -Yazen -- To unsubscribe from this list: send the line "unsubscribe linux-hwmon" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c index c88e0b127810..bd33613ecb7c 100644 --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -14,8 +14,11 @@ #include <asm/amd_nb.h> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F3 0x15eb +#define PCI_DEVICE_ID_AMD_17H_RR_DF_F4 0x15ec /* Protect the PCI config register pairs used for SMN and DF indirect access. */ static DEFINE_MUTEX(smn_mutex); @@ -24,6 +27,7 @@ static u32 *flush_words; static const struct pci_device_id amd_root_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_ROOT) }, {} }; @@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, {} }; @@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_RR_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, {} };
Add Raven Ridge root bridge and data fabric PCI IDs. This is required for amd_pci_dev_to_node_id() and amd_smn_read(). Signed-off-by: Guenter Roeck <linux@roeck-us.net> --- This patch is a prerequisite for the second patch in the series. I'll be happy to apply both patches through hwmon if that is acceptable (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch to be available upstream. Since that there is no public documentation available for Raven Ridge, PCI IDs are derived from output of lspci. arch/x86/kernel/amd_nb.c | 6 ++++++ 1 file changed, 6 insertions(+)