diff mbox

[v1,17/29] target-microblaze: dec_msr: Use bool and extract32

Message ID 20180503091922.28733-18-edgar.iglesias@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Edgar E. Iglesias May 3, 2018, 9:19 a.m. UTC
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Use bool and extract32 to represent the to, clr and
clrset flags.

No functional change.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/translate.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

Comments

Richard Henderson May 3, 2018, 6:53 p.m. UTC | #1
On 05/03/2018 02:19 AM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> 
> Use bool and extract32 to represent the to, clr and
> clrset flags.
> 
> No functional change.
> 
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target/microblaze/translate.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Alistair Francis May 3, 2018, 9:44 p.m. UTC | #2
On Thu, May 3, 2018 at 2:32 AM Edgar E. Iglesias <edgar.iglesias@gmail.com>
wrote:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

> Use bool and extract32 to represent the to, clr and
> clrset flags.

> No functional change.

> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>   target/microblaze/translate.c | 15 +++++++++------
>   1 file changed, 9 insertions(+), 6 deletions(-)

> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index 3029e0e873..d2788451fe 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -458,17 +458,20 @@ static void dec_msr(DisasContext *dc)
>   {
>       CPUState *cs = CPU(dc->cpu);
>       TCGv_i32 t0, t1;
> -    unsigned int sr, to, rn;
> +    unsigned int sr, rn;
> +    bool to, clrset;

> -    sr = dc->imm & ((1 << 14) - 1);
> -    to = dc->imm & (1 << 14);
> +    sr = extract32(dc->imm, 0, 14);
> +    to = extract32(dc->imm, 14, 1);
> +    clrset = extract32(dc->imm, 15, 1) == 0;
>       dc->type_b = 1;
> -    if (to)
> +    if (to) {
>           dc->cpustate_changed = 1;
> +    }

>       /* msrclr and msrset.  */
> -    if (!(dc->imm & (1 << 15))) {
> -        unsigned int clr = dc->ir & (1 << 16);
> +    if (clrset) {
> +        bool clr = extract32(dc->ir, 16, 1);

>           LOG_DIS("msr%s r%d imm=%x\n", clr ? "clr" : "set",
>                   dc->rd, dc->imm);
> --
> 2.14.1
diff mbox

Patch

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 3029e0e873..d2788451fe 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -458,17 +458,20 @@  static void dec_msr(DisasContext *dc)
 {
     CPUState *cs = CPU(dc->cpu);
     TCGv_i32 t0, t1;
-    unsigned int sr, to, rn;
+    unsigned int sr, rn;
+    bool to, clrset;
 
-    sr = dc->imm & ((1 << 14) - 1);
-    to = dc->imm & (1 << 14);
+    sr = extract32(dc->imm, 0, 14);
+    to = extract32(dc->imm, 14, 1);
+    clrset = extract32(dc->imm, 15, 1) == 0;
     dc->type_b = 1;
-    if (to)
+    if (to) {
         dc->cpustate_changed = 1;
+    }
 
     /* msrclr and msrset.  */
-    if (!(dc->imm & (1 << 15))) {
-        unsigned int clr = dc->ir & (1 << 16);
+    if (clrset) {
+        bool clr = extract32(dc->ir, 16, 1);
 
         LOG_DIS("msr%s r%d imm=%x\n", clr ? "clr" : "set",
                 dc->rd, dc->imm);